[x265] [PATCH 223 of 307] x86: AVX512 interp_8tap_vert_sp_48x64
mythreyi at multicorewareinc.com
mythreyi at multicorewareinc.com
Sat Apr 7 04:33:41 CEST 2018
# HG changeset patch
# User Vignesh Vijayakumar<vignesh at multicorewareinc.com>
# Date 1512037814 -19800
# Thu Nov 30 16:00:14 2017 +0530
# Node ID 3e14c3f607d0f9ec6dd3735d21fc2e698217fe71
# Parent adbbeb6c2f1e3697515561179abe156bacc7cd1c
x86: AVX512 interp_8tap_vert_sp_48x64
AVX2 performance : 12.50x
AVX512 performance : 21.14x
diff -r adbbeb6c2f1e -r 3e14c3f607d0 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Nov 30 15:57:09 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu Nov 30 16:00:14 2017 +0530
@@ -5008,6 +5008,7 @@
p.pu[LUMA_32x24].luma_vsp = PFX(interp_8tap_vert_sp_32x24_avx512);
p.pu[LUMA_32x16].luma_vsp = PFX(interp_8tap_vert_sp_32x16_avx512);
p.pu[LUMA_32x8].luma_vsp = PFX(interp_8tap_vert_sp_32x8_avx512);
+ p.pu[LUMA_48x64].luma_vsp = PFX(interp_8tap_vert_sp_48x64_avx512);
p.pu[LUMA_64x64].luma_vsp = PFX(interp_8tap_vert_sp_64x64_avx512);
p.pu[LUMA_64x48].luma_vsp = PFX(interp_8tap_vert_sp_64x48_avx512);
p.pu[LUMA_64x32].luma_vsp = PFX(interp_8tap_vert_sp_64x32_avx512);
diff -r adbbeb6c2f1e -r 3e14c3f607d0 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Thu Nov 30 15:57:09 2017 +0530
+++ b/source/common/x86/ipfilter8.asm Thu Nov 30 16:00:14 2017 +0530
@@ -13356,6 +13356,7 @@
PROCESS_LUMA_VERT_SS_24x8_AVX512
RET
%endif
+
%macro PROCESS_LUMA_VERT_S_32x2_AVX512 1
movu m1, [r0] ;0 row
movu m3, [r0 + r1] ;1 row
@@ -13501,8 +13502,9 @@
FILTER_VER_S_LUMA_32xN_AVX512 sp, 24
FILTER_VER_S_LUMA_32xN_AVX512 sp, 64
%endif
-%macro PROCESS_LUMA_VERT_SS_48x4_AVX512 0
- PROCESS_LUMA_VERT_S_32x2_AVX512 ss
+
+%macro PROCESS_LUMA_VERT_S_48x4_AVX512 1
+ PROCESS_LUMA_VERT_S_32x2_AVX512 %1
movu m1, [r0 + 2 * r1]
movu m3, [r0 + r7]
punpcklwd m0, m1, m3
@@ -13553,23 +13555,38 @@
pmaddwd m14, m18
punpckhwd m12, m13
pmaddwd m12, m18
-
paddd m8, m14
paddd m4, m12
- paddd m0, m8
- paddd m1, m4
-
movu m12, [r4 + 2 * r1]
punpcklwd m14, m13, m12
pmaddwd m14, m18
punpckhwd m13, m12
pmaddwd m13, m18
-
paddd m10, m14
paddd m11, m13
+
+ paddd m0, m8
+ paddd m1, m4
paddd m2, m10
paddd m3, m11
-
+%ifidn %1, sp
+ paddd m0, m19
+ paddd m1, m19
+ paddd m2, m19
+ paddd m3, m19
+
+ psrad m0, 12
+ psrad m1, 12
+ psrad m2, 12
+ psrad m3, 12
+
+ packssdw m0, m1
+ packssdw m2, m3
+ packuswb m0, m2
+ vpermq m0, m20, m0
+ movu [r2 + 2 * r3], ym0
+ vextracti32x8 [r2 + r5], m0, 1
+%else
psrad m0, 6
psrad m1, 6
psrad m2, 6
@@ -13577,10 +13594,9 @@
packssdw m0, m1
packssdw m2, m3
-
movu [r2 + 2 * r3], m0
movu [r2 + r5], m2
-
+%endif
movu ym1, [r0 + mmsize]
movu ym3, [r0 + r1 + mmsize]
vinserti32x8 m1, [r0 + 2 * r1 + mmsize], 1
@@ -13637,24 +13653,41 @@
pmaddwd m14, m18
punpckhwd m12, m13
pmaddwd m12, m18
-
paddd m8, m14
paddd m4, m12
- paddd m0, m8
- paddd m1, m4
-
movu ym12, [r6 + 4 * r1 + mmsize]
vinserti32x8 m12, [r4 + 2 * r1 + mmsize], 1
punpcklwd m14, m13, m12
pmaddwd m14, m18
punpckhwd m13, m12
pmaddwd m13, m18
-
paddd m10, m14
paddd m11, m13
+
+ paddd m0, m8
+ paddd m1, m4
paddd m2, m10
paddd m3, m11
-
+%ifidn %1, sp
+ paddd m0, m19
+ paddd m1, m19
+ paddd m2, m19
+ paddd m3, m19
+
+ psrad m0, 12
+ psrad m1, 12
+ psrad m2, 12
+ psrad m3, 12
+
+ packssdw m0, m1
+ packssdw m2, m3
+ packuswb m0, m2
+ vpermq m0, m20, m0
+ movu [r2 + mmsize/2], xm0
+ vextracti32x4 [r2 + r3 + mmsize/2], m0, 2
+ vextracti32x4 [r2 + 2 * r3 + mmsize/2], m0, 1
+ vextracti32x4 [r2 + r5 + mmsize/2], m0, 3
+%else
psrad m0, 6
psrad m1, 6
psrad m2, 6
@@ -13667,15 +13700,15 @@
movu [r2 + r3 + mmsize], ym2
vextracti32x8 [r2 + 2 * r3 + mmsize], m0, 1
vextracti32x8 [r2 + r5 + mmsize], m2, 1
+%endif
%endmacro
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
-%if ARCH_X86_64
+%macro FILTER_VER_S_LUMA_48x64_AVX512 1
INIT_ZMM avx512
-cglobal interp_8tap_vert_ss_48x64, 5, 8, 19
+cglobal interp_8tap_vert_%1_48x64, 5, 8, 21
add r1d, r1d
- add r3d, r3d
lea r7, [3 * r1]
sub r0, r7
shl r4d, 8
@@ -13692,16 +13725,28 @@
mova m17, [r5 + 2 * mmsize]
mova m18, [r5 + 3 * mmsize]
%endif
+%ifidn %1, sp
+ vbroadcasti32x4 m19, [pd_526336]
+ mova m20, [interp8_vsp_store_avx512]
+%else
+ add r3d, r3d
+%endif
lea r5, [3 * r3]
%rep 15
- PROCESS_LUMA_VERT_SS_48x4_AVX512
+ PROCESS_LUMA_VERT_S_48x4_AVX512 %1
lea r0, [r0 + 4 * r1]
lea r2, [r2 + 4 * r3]
%endrep
- PROCESS_LUMA_VERT_SS_48x4_AVX512
- RET
-%endif
+ PROCESS_LUMA_VERT_S_48x4_AVX512 %1
+ RET
+%endmacro
+
+%if ARCH_X86_64
+ FILTER_VER_S_LUMA_48x64_AVX512 ss
+ FILTER_VER_S_LUMA_48x64_AVX512 sp
+%endif
+
%macro PROCESS_LUMA_VERT_S_64x2_AVX512 1
PROCESS_LUMA_VERT_S_32x2_AVX512 %1
movu m1, [r0 + mmsize] ;0 row
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