[x265] [PATCH 249 of 307] x86: AVX512 interp_8tap_vert_ps_16xN

mythreyi at multicorewareinc.com mythreyi at multicorewareinc.com
Sat Apr 7 04:34:07 CEST 2018


# HG changeset patch
# User Jayashri Murugan <jayashri at multicorewareinc.com>
# Date 1512722575 -19800
#      Fri Dec 08 14:12:55 2017 +0530
# Node ID 617aa7cf2c76368cb8a3b252175c1b3d6f716915
# Parent  3d7a32f87793527d40d17024c1bb415a95cbdeae
x86: AVX512 interp_8tap_vert_ps_16xN

Disabled lesser performance giving kernel compared to avx2

Size  |  AVX2 performance | AVX512 performance
----------------------------------------------
16x8  |      20.65x       |      23.95x
16x16 |      20.89x       |      25.62x
16x32 |      22.76x       |      27.54x
16x64 |      26.14x       |      24.02x

diff -r 3d7a32f87793 -r 617aa7cf2c76 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri Dec 08 12:40:26 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp	Fri Dec 08 14:12:55 2017 +0530
@@ -5203,6 +5203,11 @@
         p.pu[LUMA_32x32].luma_vps = PFX(interp_8tap_vert_ps_32x32_avx512);
         p.pu[LUMA_32x24].luma_vps = PFX(interp_8tap_vert_ps_32x24_avx512);
         p.pu[LUMA_32x64].luma_vps = PFX(interp_8tap_vert_ps_32x64_avx512);
+
+        p.pu[LUMA_16x8].luma_vps = PFX(interp_8tap_vert_ps_16x8_avx512);
+        p.pu[LUMA_16x16].luma_vps = PFX(interp_8tap_vert_ps_16x16_avx512);
+        p.pu[LUMA_16x32].luma_vps = PFX(interp_8tap_vert_ps_16x32_avx512);
+        //p.pu[LUMA_16x64].luma_vps = PFX(interp_8tap_vert_ps_16x64_avx512);
     }
 #endif
 }
diff -r 3d7a32f87793 -r 617aa7cf2c76 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm	Fri Dec 08 12:40:26 2017 +0530
+++ b/source/common/x86/ipfilter8.asm	Fri Dec 08 14:12:55 2017 +0530
@@ -14097,7 +14097,7 @@
 ;-------------------------------------------------------------------------------------------------------------
 ;avx512 luma_vpp and luma_vps code start
 ;-------------------------------------------------------------------------------------------------------------
-%macro PROCESS_LUMA_VERT_PP_16x8_AVX512 0
+%macro PROCESS_LUMA_VERT_16x8_AVX512 1
     lea                   r5,                 [r0 + 4 * r1]
     lea                   r4,                 [r5 + 4 * r1]
     movu                  xm1,                [r0]
@@ -14193,7 +14193,7 @@
     paddw                 m1,                 m13
     paddw                 m2,                 m14
     paddw                 m3,                 m15
-
+%ifidn %1,pp
     pmulhrsw              m0,                 m7
     pmulhrsw              m1,                 m7
     pmulhrsw              m2,                 m7
@@ -14210,20 +14210,41 @@
     vextracti32x4         [r2 + r3],          m2,                  2
     vextracti32x4         [r2 + 2 * r3],      m0,                  3
     vextracti32x4         [r2 + r7],          m2,                  3
-%endmacro
-
+%else
+    psubw                 m0,                 m7
+    psubw                 m1,                 m7
+    psubw                 m2,                 m7
+    psubw                 m3,                 m7
+
+    mova                  m12,                 m16
+    mova                  m13,                 m17
+    mova                  m14,                 m16
+    mova                  m15,                 m17
+
+    vpermi2q              m12,                 m0,                m1
+    vpermi2q              m13,                 m0,                m1
+    vpermi2q              m14,                 m2,                m3
+    vpermi2q              m15,                 m2,                m3
+
+    movu                  [r2],               ym12
+    movu                  [r2 + r3],          ym14
+    vextracti32x8         [r2 + 2 * r3],      m12,                 1
+    vextracti32x8         [r2 + r7],          m14,                 1
+    lea                   r2,                 [r2 + 4 * r3]
+    movu                  [r2],               ym13
+    movu                  [r2 + r3],          ym15
+    vextracti32x8         [r2 + 2 * r3],      m13,                 1
+    vextracti32x8         [r2 + r7],          m15,                 1
+%endif
+%endmacro
 ;-----------------------------------------------------------------------------------------------------------------
 ; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
 ;-----------------------------------------------------------------------------------------------------------------
-%macro FILTER_VER_PP_LUMA_16xN_AVX512 1
+%macro FILTER_VERT_LUMA_16xN_AVX512 2
 INIT_ZMM avx512
-cglobal interp_8tap_vert_pp_16x%1, 5, 9, 16
+cglobal interp_8tap_vert_%1_16x%2, 5, 9, 18
     mov                   r4d,                r4m
     shl                   r4d,                8
-    lea                   r6,                 [3 * r1]
-    lea                   r7,                 [3 * r3]
-    sub                   r0,                 r6
-
 %ifdef PIC
     lea                   r5,                 [tab_LumaCoeffVer_32_avx512]
     mova                  m8,                 [r5 + r4]
@@ -14236,22 +14257,38 @@
     mova                  m10,                [tab_LumaCoeffVer_32_avx512 + r4 + 2 * mmsize]
     mova                  m11,                [tab_LumaCoeffVer_32_avx512 + r4 + 3 * mmsize]
 %endif
-
+%ifidn %1, pp
     vbroadcasti32x8       m7,                 [pw_512]
-%rep %1/8 - 1
-    PROCESS_LUMA_VERT_PP_16x8_AVX512
+%else
+    add                   r3d,                r3d
+    vbroadcasti32x8       m7,                 [pw_2000]
+    mova                  m16,                [interp4_vps_store1_avx512]
+    mova                  m17,                [interp4_vps_store2_avx512]
+%endif
+
+    lea                   r6,                 [3 * r1]
+    lea                   r7,                 [3 * r3]
+    sub                   r0,                 r6
+
+%rep %2/8 - 1
+    PROCESS_LUMA_VERT_16x8_AVX512 %1
     lea                   r0,                 [r4]
     lea                   r2,                 [r2 + 4 * r3]
 %endrep
-    PROCESS_LUMA_VERT_PP_16x8_AVX512
+    PROCESS_LUMA_VERT_16x8_AVX512 %1
     RET
 %endmacro
 
 %if ARCH_X86_64
-    FILTER_VER_PP_LUMA_16xN_AVX512 8
-    FILTER_VER_PP_LUMA_16xN_AVX512 16
-    FILTER_VER_PP_LUMA_16xN_AVX512 32
-    FILTER_VER_PP_LUMA_16xN_AVX512 64
+    FILTER_VERT_LUMA_16xN_AVX512 pp, 8
+    FILTER_VERT_LUMA_16xN_AVX512 pp, 16
+    FILTER_VERT_LUMA_16xN_AVX512 pp, 32
+    FILTER_VERT_LUMA_16xN_AVX512 pp, 64
+
+    FILTER_VERT_LUMA_16xN_AVX512 ps, 8
+    FILTER_VERT_LUMA_16xN_AVX512 ps, 16
+    FILTER_VERT_LUMA_16xN_AVX512 ps, 32
+    FILTER_VERT_LUMA_16xN_AVX512 ps, 64
 %endif
 %macro PROCESS_LUMA_VERT_32x4_AVX512 1
     lea                   r5,                 [r0 + 4 * r1]


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