[x265] [PATCH] testharness.h: Fix register width when reading CNTVCT_EL0
chen
chenm003 at 163.com
Thu Feb 20 15:32:48 UTC 2025
looks good, thank for patch.
At 2025-02-20 20:21:23, "George Steed" <george.steed at arm.com> wrote:
>Clang emits a warning here since `a` is a 32-bit variable but CNTVCT_EL0
>is a 64-bit register. Suppress this warning by explicitly giving the
>destination register an x-register operand modifier to ensure the read
>is done as 64-bits to match.
>---
> source/test/testharness.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/source/test/testharness.h b/source/test/testharness.h
>index af49a910e..368c865ee 100644
>--- a/source/test/testharness.h
>+++ b/source/test/testharness.h
>@@ -89,7 +89,7 @@ static inline uint32_t __rdtsc(void)
> a = clock();
> #elif X265_ARCH_ARM64
> asm volatile("isb" : : : "memory");
>- asm volatile("mrs %0, cntvct_el0" : "=r"(a));
>+ asm volatile("mrs %x0, cntvct_el0" : "=r"(a));
> #endif
> return a;
> }
>--
>2.34.1
>
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