[x265] [PATCH Review only] asm: pixel_add_pp routine for block sizes 64x16, 64x32, 64x48 and 64x64

murugan at multicorewareinc.com murugan at multicorewareinc.com
Wed Nov 6 09:08:50 CET 2013


# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1383725299 -19800
#      Wed Nov 06 13:38:19 2013 +0530
# Node ID 44c2a88e90d26b232f64c7974206bd03ac292147
# Parent  d14d18379efbeb4b77e84e66e809c8d02715530e
asm: pixel_add_pp routine for block sizes 64x16, 64x32, 64x48 and 64x64

diff -r d14d18379efb -r 44c2a88e90d2 source/common/x86/pixel-add8.asm
--- a/source/common/x86/pixel-add8.asm	Wed Nov 06 13:17:22 2013 +0530
+++ b/source/common/x86/pixel-add8.asm	Wed Nov 06 13:38:19 2013 +0530
@@ -535,3 +535,70 @@
 PIXELADD_PP_W32_H2 32, 32
 PIXELADD_PP_W32_H2 32, 64
 
+;-----------------------------------------------------------------------------
+; void pixel_add_pp_c_%1x%2(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1);
+;-----------------------------------------------------------------------------
+%macro PIXELADD_PP_W64_H2 2
+INIT_XMM sse2
+cglobal pixel_add_pp_%1x%2, 4, 7, 8, dest, deststride, src0, src1
+
+mov    r4d,    r4m
+mov    r5d,    r5m
+mov    r6d,    %2
+
+.loop
+
+    movu       m0,    [r2]
+    movu       m1,    [r2 + 16]
+    movu       m2,    [r2 + 32]
+    movu       m3,    [r2 + 48]
+    movu       m4,    [r3]
+    movu       m5,    [r3 + 16]
+    movu       m6,    [r3 + 32]
+    movu       m7,    [r3 + 48]
+
+    paddusb    m0,    m4
+    paddusb    m1,    m5
+    paddusb    m2,    m6
+    paddusb    m3,    m7
+
+    movu    [r0],         m0
+    movu    [r0 + 16],    m1
+    movu    [r0 + 32],    m2
+    movu    [r0 + 48],    m3
+
+    movu       m0,    [r2 + r4]
+    movu       m1,    [r2 + r4 + 16]
+    movu       m2,    [r2 + r4 + 32]
+    movu       m3,    [r2 + r4 + 48]
+    movu       m4,    [r3 + r5]
+    movu       m5,    [r3 + r5 + 16]
+    movu       m6,    [r3 + r5 + 32]
+    movu       m7,    [r3 + r5 + 48]
+
+    paddusb    m0,    m4
+    paddusb    m1,    m5
+    paddusb    m2,    m6
+    paddusb    m3,    m7
+
+    movu    [r0 + r1],         m0
+    movu    [r0 + r1 + 16],    m1
+    movu    [r0 + r1 + 32],    m2
+    movu    [r0 + r1 + 48],    m3
+
+    lea     r2,                [r2 + 2 * r4]
+    lea     r3,                [r3 + 2 * r5]
+    lea     r0,                [r0 + 2 * r1]
+
+    sub     r6d,               2
+
+jnz    .loop
+
+RET
+%endmacro
+
+PIXELADD_PP_W64_H2 64, 16
+PIXELADD_PP_W64_H2 64, 32
+PIXELADD_PP_W64_H2 64, 48
+PIXELADD_PP_W64_H2 64, 64
+


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