[x265] [PATCH] blockcopy_sp_24x32, optimized asm code

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1383920738 -19800
# Node ID ab350c7a2ce406a38bdcdaecb365dcbcbcb30c73
# Parent  56e53d6f82a6c0c5eb3ba1ac373523f2acf60669
blockcopy_sp_24x32, optimized asm code

diff -r 56e53d6f82a6 -r ab350c7a2ce4 source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm	Fri Nov 08 19:26:48 2013 +0530
+++ b/source/common/x86/blockcopy8.asm	Fri Nov 08 19:55:38 2013 +0530
@@ -1372,40 +1372,33 @@
 ;-----------------------------------------------------------------------------
 %macro BLOCKCOPY_SP_W24_H2 2
 INIT_XMM sse2
-cglobal blockcopy_sp_%1x%2, 4, 5, 7, dest, destStride, src, srcStride
+cglobal blockcopy_sp_%1x%2, 4, 5, 6, dest, destStride, src, srcStride
 
-mov        r4d,     %2
+mov             r4d,     %2/2
 
-add        r3,      r3
-
-mova       m0,      [tab_Vm]
+add             r3,      r3
 
 .loop
-     movu       m1,      [r2]
-     movu       m2,      [r2 + 16]
-     movu       m3,      [r2 + 32]
-     movu       m4,      [r2 + r3]
-     movu       m5,      [r2 + r3 + 16]
-     movu       m6,      [r2 + r3 + 32]
+     movu       m0,      [r2]
+     movu       m1,      [r2 + 16]
+     movu       m2,      [r2 + 32]
+     movu       m3,      [r2 + r3]
+     movu       m4,      [r2 + r3 + 16]
+     movu       m5,      [r2 + r3 + 32]
 
-     pshufb     m1,      m0
-     pshufb     m2,      m0
-     pshufb     m3,      m0
-     pshufb     m4,      m0
-     pshufb     m5,      m0
-     pshufb     m6,      m0
+     packuswb   m0,      m1
+     packuswb   m2,      m3
+     packuswb   m4,      m5
 
-     movh       [r0],              m1
-     movh       [r0 + 8],          m2
-     movh       [r0 + 16],         m3
-     movh       [r0 + r1],         m4
-     movh       [r0 + r1 + 8],     m5
-     movh       [r0 + r1 + 16],    m6
+     movu       [r0],            m0
+     movlps     [r0 + 16],       m2
+     movhps     [r0 + r1],       m2
+     movu       [r0 + r1 + 8],   m4
 
      lea        r0,              [r0 + 2 * r1]
      lea        r2,              [r2 + 2 * r3]
 
-     sub        r4d,             2
+     dec        r4d
      jnz        .loop
 
 RET