[x265] [PATCH] blockcopy_sp_32xN, optimized asm code

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1383925881 -19800
# Node ID eb99ce96cf7f261816694b6083b8d4d0d986d7df
# Parent  fae2b7777b9ee77cc8ad1b1e118b679964b567b9
blockcopy_sp_32xN, optimized asm code

diff -r fae2b7777b9e -r eb99ce96cf7f source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm	Fri Nov 08 21:17:13 2013 +0530
+++ b/source/common/x86/blockcopy8.asm	Fri Nov 08 21:21:21 2013 +0530
@@ -1411,49 +1411,36 @@
 ;-----------------------------------------------------------------------------
 %macro BLOCKCOPY_SP_W32_H2 2
 INIT_XMM sse2
-cglobal blockcopy_sp_%1x%2, 4, 5, 5, dest, destStride, src, srcStride
+cglobal blockcopy_sp_%1x%2, 4, 5, 8, dest, destStride, src, srcStride
 
-mov         r4d,    %2
+mov             r4d,     %2/2
 
-add        r3,      r3
-
-mova       m0,      [tab_Vm]
+add             r3,      r3
 
 .loop
-     movu       m1,      [r2]
-     movu       m2,      [r2 + 16]
-     movu       m3,      [r2 + 32]
-     movu       m4,      [r2 + 48]
+     movu       m0,      [r2]
+     movu       m1,      [r2 + 16]
+     movu       m2,      [r2 + 32]
+     movu       m3,      [r2 + 48]
+     movu       m4,      [r2 + r3]
+     movu       m5,      [r2 + r3 + 16]
+     movu       m6,      [r2 + r3 + 32]
+     movu       m7,      [r2 + r3 + 48]
 
-     pshufb     m1,      m0
-     pshufb     m2,      m0
-     pshufb     m3,      m0
-     pshufb     m4,      m0
+     packuswb   m0,      m1
+     packuswb   m2,      m3
+     packuswb   m4,      m5
+     packuswb   m6,      m7
 
-     movh       [r0],              m1
-     movh       [r0 + 8],          m2
-     movh       [r0 + 16],         m3
-     movh       [r0 + 24],         m4
-
-     movu       m1,      [r2 + r3]
-     movu       m2,      [r2 + r3 + 16]
-     movu       m3,      [r2 + r3 + 32]
-     movu       m4,      [r2 + r3 + 48]
-
-     pshufb     m1,      m0
-     pshufb     m2,      m0
-     pshufb     m3,      m0
-     pshufb     m4,      m0
-
-     movh       [r0 + r1],              m1
-     movh       [r0 + r1 + 8],          m2
-     movh       [r0 + r1 + 16],         m3
-     movh       [r0 + r1 + 24],         m4
+     movu       [r0],            m0
+     movu       [r0 + 16],       m2
+     movu       [r0 + r1],       m4
+     movu       [r0 + r1 + 16],  m6
 
      lea        r0,              [r0 + 2 * r1]
      lea        r2,              [r2 + 2 * r3]
 
-     sub        r4d,             2
+     dec        r4d
      jnz        .loop
 
 RET