[x265] [PATCH] asm: code for pixel_sse_sp_24x32
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Wed Nov 27 14:42:58 CET 2013
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1385559769 -19800
# Wed Nov 27 19:12:49 2013 +0530
# Branch stable
# Node ID 2f66bfd1237aa1c2b859cd31e1084e84524dea59
# Parent f8eef9dd7e408748e505a7a7d3253b32cb6702bd
asm: code for pixel_sse_sp_24x32
diff -r f8eef9dd7e40 -r 2f66bfd1237a source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed Nov 27 19:11:33 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp Wed Nov 27 19:12:49 2013 +0530
@@ -651,6 +651,7 @@
p.sse_sp[LUMA_16x16] = x265_pixel_ssd_sp_16x16_sse4;
p.sse_sp[LUMA_16x32] = x265_pixel_ssd_sp_16x32_sse4;
p.sse_sp[LUMA_16x64] = x265_pixel_ssd_sp_16x64_sse4;
+ p.sse_sp[LUMA_24x32] = x265_pixel_ssd_sp_24x32_sse4;
p.sse_sp[LUMA_32x8] = x265_pixel_ssd_sp_32x8_sse4;
p.sse_sp[LUMA_32x16] = x265_pixel_ssd_sp_32x16_sse4;
p.sse_sp[LUMA_32x24] = x265_pixel_ssd_sp_32x24_sse4;
diff -r f8eef9dd7e40 -r 2f66bfd1237a source/common/x86/pixel-a.asm
--- a/source/common/x86/pixel-a.asm Wed Nov 27 19:11:33 2013 +0530
+++ b/source/common/x86/pixel-a.asm Wed Nov 27 19:12:49 2013 +0530
@@ -1534,6 +1534,51 @@
RET
;-----------------------------------------------------------------------------
+; int pixel_ssd_sp_24x32( int16_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_sp_24x32, 4, 7, 8, src1, stride1, src2, stride2
+ pxor m6, m6
+ pxor m7, m7
+ add r1, r1
+ lea r4, [r1 * 2]
+ mov r5, r0
+ mov r6, r2
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r0 + r4]
+ lea r2, [r2 + 2 * r3]
+ call pixel_ssd_sp_16x16_internal
+ lea r0, [r5 + 32]
+ lea r2, [r6 + 16]
+ lea r4, [r1 * 3]
+ lea r5, [r3 * 3]
+ call pixel_ssd_sp_8x4_internal
+ lea r0, [r0 + 4 * r1]
+ lea r2, [r2 + 4 * r3]
+ call pixel_ssd_sp_8x4_internal
+ lea r0, [r0 + 4 * r1]
+ lea r2, [r2 + 4 * r3]
+ call pixel_ssd_sp_8x4_internal
+ lea r0, [r0 + 4 * r1]
+ lea r2, [r2 + 4 * r3]
+ call pixel_ssd_sp_8x4_internal
+ lea r0, [r0 + 4 * r1]
+ lea r2, [r2 + 4 * r3]
+ call pixel_ssd_sp_8x4_internal
+ lea r0, [r0 + 4 * r1]
+ lea r2, [r2 + 4 * r3]
+ call pixel_ssd_sp_8x4_internal
+ lea r0, [r0 + 4 * r1]
+ lea r2, [r2 + 4 * r3]
+ call pixel_ssd_sp_8x4_internal
+ lea r0, [r0 + 4 * r1]
+ lea r2, [r2 + 4 * r3]
+ call pixel_ssd_sp_8x4_internal
+ HADDD m7, m1
+ movd eax, m7
+ RET
+
+;-----------------------------------------------------------------------------
; int pixel_ssd_32x8( uint8_t *, intptr_t, uint8_t *, intptr_t )
;-----------------------------------------------------------------------------
INIT_XMM sse4
diff -r f8eef9dd7e40 -r 2f66bfd1237a source/common/x86/pixel.h
--- a/source/common/x86/pixel.h Wed Nov 27 19:11:33 2013 +0530
+++ b/source/common/x86/pixel.h Wed Nov 27 19:12:49 2013 +0530
@@ -411,6 +411,7 @@
int x265_pixel_ssd_sp_16x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
int x265_pixel_ssd_sp_16x32_sse4(int16_t *, intptr_t, pixel *, intptr_t);
int x265_pixel_ssd_sp_16x64_sse4(int16_t *, intptr_t, pixel *, intptr_t);
+int x265_pixel_ssd_sp_24x32_sse4(int16_t *, intptr_t, pixel *, intptr_t);
int x265_pixel_ssd_sp_32x8_sse4(int16_t *, intptr_t, pixel *, intptr_t);
int x265_pixel_ssd_sp_32x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
int x265_pixel_ssd_sp_32x24_sse4(int16_t *, intptr_t, pixel *, intptr_t);
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