[x265] [PATCH] asm: code for pixel_sse_sp_12x16

murugan at multicorewareinc.com murugan at multicorewareinc.com
Thu Nov 28 10:28:59 CET 2013


# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1385630919 -19800
#      Thu Nov 28 14:58:39 2013 +0530
# Node ID 7a0fe2f9074330bb3126e95194e7c4ed956c6e4d
# Parent  a0fbadcf1f913211e0d0915778e6c8bf462da754
asm: code for pixel_sse_sp_12x16

diff -r a0fbadcf1f91 -r 7a0fe2f90743 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu Nov 28 14:57:10 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Thu Nov 28 14:58:39 2013 +0530
@@ -655,6 +655,7 @@
         p.sse_sp[LUMA_8x8] = x265_pixel_ssd_sp_8x8_sse4;
         p.sse_sp[LUMA_8x16] = x265_pixel_ssd_sp_8x16_sse4;
         p.sse_sp[LUMA_8x32] = x265_pixel_ssd_sp_8x32_sse4;
+        p.sse_sp[LUMA_12x16] = x265_pixel_ssd_sp_12x16_sse4;
         p.sse_sp[LUMA_16x4] = x265_pixel_ssd_sp_16x4_sse4;
         p.sse_sp[LUMA_16x8] = x265_pixel_ssd_sp_16x8_sse4;
         p.sse_sp[LUMA_16x12] = x265_pixel_ssd_sp_16x12_sse4;
diff -r a0fbadcf1f91 -r 7a0fe2f90743 source/common/x86/pixel-a.asm
--- a/source/common/x86/pixel-a.asm	Thu Nov 28 14:57:10 2013 +0530
+++ b/source/common/x86/pixel-a.asm	Thu Nov 28 14:58:39 2013 +0530
@@ -1596,6 +1596,43 @@
     movd     eax,    m7
     RET
 
+;-----------------------------------------------------------------------------
+; int pixel_ssd_sp_12x16( int16_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+INIT_XMM sse4
+cglobal pixel_ssd_sp_12x16, 4, 7, 8, src1, stride1, src2, stride2
+    pxor     m7,     m7
+    add      r1,     r1
+    lea      r4,     [r1 * 3]
+    mov      r5,     r0
+    mov      r6,     r2
+    call     pixel_ssd_sp_4x4_internal
+    lea      r0,     [r0 + 4 * r1]
+    lea      r2,     [r2 + 2 * r3]
+    call     pixel_ssd_sp_4x4_internal
+    lea      r0,     [r0 + 4 * r1]
+    lea      r2,     [r2 + 2 * r3]
+    call     pixel_ssd_sp_4x4_internal
+    lea      r0,     [r0 + 4 * r1]
+    lea      r2,     [r2 + 2 * r3]
+    call     pixel_ssd_sp_4x4_internal
+    lea      r0,     [r5 + 8]
+    lea      r2,     [r6 + 4]
+    lea      r5,     [r3 * 3]
+    call     pixel_ssd_sp_8x4_internal
+    lea      r0,     [r0 + 4 * r1]
+    lea      r2,     [r2 + 4 * r3]
+    call     pixel_ssd_sp_8x4_internal
+    lea      r0,     [r0 + 4 * r1]
+    lea      r2,     [r2 + 4 * r3]
+    call     pixel_ssd_sp_8x4_internal
+    lea      r0,     [r0 + 4 * r1]
+    lea      r2,     [r2 + 4 * r3]
+    call     pixel_ssd_sp_8x4_internal
+    HADDD    m7,     m1
+    movd     eax,    m7
+    RET
+
 %macro PIXEL_SSD_SP_16x4 0
     movu         m0,    [r0]
     movu         m1,    [r0 + 16]
diff -r a0fbadcf1f91 -r 7a0fe2f90743 source/common/x86/pixel.h
--- a/source/common/x86/pixel.h	Thu Nov 28 14:57:10 2013 +0530
+++ b/source/common/x86/pixel.h	Thu Nov 28 14:58:39 2013 +0530
@@ -409,6 +409,7 @@
 int x265_pixel_ssd_sp_8x8_sse4(int16_t *, intptr_t, pixel *, intptr_t);
 int x265_pixel_ssd_sp_8x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
 int x265_pixel_ssd_sp_8x32_sse4(int16_t *, intptr_t, pixel *, intptr_t);
+int x265_pixel_ssd_sp_12x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
 int x265_pixel_ssd_sp_16x4_sse4(int16_t *, intptr_t, pixel *, intptr_t);
 int x265_pixel_ssd_sp_16x8_sse4(int16_t *, intptr_t, pixel *, intptr_t);
 int x265_pixel_ssd_sp_16x12_sse4(int16_t *, intptr_t, pixel *, intptr_t);


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