[x265] [PATCH] asm: code for pixel_sse_sp_4xN

[Murugan Vairavel]

Ignore this patch. I will send another.



On Thu, Nov 28, 2013 at 5:38 PM, chen <chenm003 at 163.com> wrote:

>
> >+;-----------------------------------------------------------------------------
> >+; int pixel_ssd_sp_4x4( int16_t *, intptr_t, uint8_t *, intptr_t )
>
> >+;-----------------------------------------------------------------------------
> >+INIT_XMM sse4
> >+cglobal pixel_ssd_sp_4x4, 4, 6, 8, src1, stride1, src2, stride2
> I think you use 5 registers only
>
>
> >+    pxor     m7,     m7
> >+    add      r1,     r1
> >+    lea      r4,     [r1 * 3]
> >+    call     pixel_ssd_sp_4x4_internal
> >+    HADDD    m7,     m1
> >+    movd     eax,    m7
> >+    RET
> >+
>
> >+;-----------------------------------------------------------------------------
> >+; int pixel_ssd_sp_4x8( int16_t *, intptr_t, uint8_t *, intptr_t )
>
> >+;-----------------------------------------------------------------------------
> >+INIT_XMM sse4
> >+cglobal pixel_ssd_sp_4x8, 4, 6, 8, src1, stride1, src2, stride2
> >+    pxor     m7,     m7
> >+    add      r1,     r1
> >+    lea      r4,     [r1 * 3]
> >+    call     pixel_ssd_sp_4x4_internal
> >+    lea      r0,     [r0 + 4 * r1]
> >+    lea      r2,     [r2 + 2 * r3]
> >+    call     pixel_ssd_sp_4x4_internal
> >+    HADDD    m7,     m1
> >+    movd     eax,    m7
> >+    RET
> >+
>
> >+;-----------------------------------------------------------------------------
> >+; int pixel_ssd_sp_4x16( int16_t *, intptr_t, uint8_t *, intptr_t )
>
> >+;-----------------------------------------------------------------------------
> >+INIT_XMM sse4
> >+cglobal pixel_ssd_sp_4x16, 4, 6, 8, src1, stride1, src2, stride2
> >+    pxor     m7,     m7
> >+    add      r1,     r1
> >+    lea      r4,     [r1 * 3]
> >+    call     pixel_ssd_sp_4x4_internal
> >+    lea      r0,     [r0 + 4 * r1]
> >+    lea      r2,     [r2 + 2 * r3]
> >+    call     pixel_ssd_sp_4x4_internal
> >+    lea      r0,     [r0 + 4 * r1]
> >+    lea      r2,     [r2 + 2 * r3]
> >+    call     pixel_ssd_sp_4x4_internal
> >+    lea      r0,     [r0 + 4 * r1]
> >+    lea      r2,     [r2 + 2 * r3]
> >+    call     pixel_ssd_sp_4x4_internal
> >+    HADDD    m7,     m1
> >+    movd     eax,    m7
> >+    RET
> >+
> > cglobal pixel_ssd_sp_8x4_internal
> >     movu         m0,    [r0]
> >     movu         m1,    [r0 + r1]
> >diff -r 949f85337789 -r a0fbadcf1f91 source/common/x86/pixel.h
> >--- a/source/common/x86/pixel.h Wed Nov 27 18:10:14 2013 -0600
> >+++ b/source/common/x86/pixel.h Thu Nov 28 14:57:10 2013 +0530
> >@@ -402,6 +402,9 @@
>
> > void x265_weight_pp_sse4(pixel *src, pixel *dst, intptr_t srcStride, intptr_t dstStride, int width, int height, int w0, int round, int shift, int offset);
>
> > void x265_weight_sp_sse4(int16_t *src, pixel *dst, intptr_t srcStride, intptr_t dstStride, int width, int height, int w0, int round, int shift, int offset);
> >
> >+int x265_pixel_ssd_sp_4x4_sse4(int16_t *, intptr_t, pixel *, intptr_t);
> >+int x265_pixel_ssd_sp_4x8_sse4(int16_t *, intptr_t, pixel *, intptr_t);
> >+int x265_pixel_ssd_sp_4x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
> > int x265_pixel_ssd_sp_8x4_sse4(int16_t *, intptr_t, pixel *, intptr_t);
> > int x265_pixel_ssd_sp_8x8_sse4(int16_t *, intptr_t, pixel *, intptr_t);
> > int x265_pixel_ssd_sp_8x16_sse4(int16_t *, intptr_t, pixel *, intptr_t);
> >_______________________________________________
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> >x265-devel at videolan.org
> >https://mailman.videolan.org/listinfo/x265-devel
>
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>
>


-- 
With Regards,

Murugan. V
+919659287478
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