[x265] [PATCH] asm: assembly code for pixel_sad_16x64

[dnyaneshwar at multicorewareinc.com]

# HG changeset patch
# User Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
# Date 1382957168 -19800
#      Mon Oct 28 16:16:08 2013 +0530
# Node ID a44e10ccd754dcd8a5c24bc078c1912fa80782a0
# Parent  b9a9f725d4892ced1176288fe1e20069fa188132
asm: assembly code for pixel_sad_16x64

diff -r b9a9f725d489 -r a44e10ccd754 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Mon Oct 28 16:11:20 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon Oct 28 16:16:08 2013 +0530
@@ -236,6 +236,7 @@
         //PIXEL_AVE(sse2);
 
         p.sad[LUMA_16x32]  = x265_pixel_sad_16x32_sse2;
+        p.sad[LUMA_16x64]  = x265_pixel_sad_16x64_sse2;
 
         ASSGN_SSE(sse2);
         INIT2(sad, _sse2);
diff -r b9a9f725d489 -r a44e10ccd754 source/common/x86/sad-a.asm
--- a/source/common/x86/sad-a.asm	Mon Oct 28 16:11:20 2013 +0530
+++ b/source/common/x86/sad-a.asm	Mon Oct 28 16:16:08 2013 +0530
@@ -267,6 +267,34 @@
     movd   eax, m0
     RET
 
+;-----------------------------------------------------------------------------
+; int pixel_sad_16x64( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+cglobal pixel_sad_16x64, 4,4,3
+    pxor m0, m0
+
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+    PROCESS_SAD_4x16
+
+    movhlps m1, m0
+    paddd   m0, m1
+    movd   eax, m0
+    RET
+
 %endmacro
 
 INIT_XMM sse2