[x265] [PATCH] asm: assembly code for pixel_sad_16x64

[dnyaneshwar at multicorewareinc.com]

# HG changeset patch
# User Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
# Date 1383029210 -19800
#      Tue Oct 29 12:16:50 2013 +0530
# Node ID 2a8c8a41aa10b6150c9f59a01cf620ebed298473
# Parent  4601159b4a77737e138ea6957a017bcb7bfeccb2
asm: assembly code for pixel_sad_16x64

diff -r 4601159b4a77 -r 2a8c8a41aa10 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Tue Oct 29 11:27:02 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Tue Oct 29 12:16:50 2013 +0530
@@ -236,6 +236,7 @@
         //PIXEL_AVE(sse2);
 
         p.sad[LUMA_16x32]  = x265_pixel_sad_16x32_sse2;
+        p.sad[LUMA_16x64]  = x265_pixel_sad_16x64_sse2;
 
         ASSGN_SSE(sse2);
         INIT2(sad, _sse2);
diff -r 4601159b4a77 -r 2a8c8a41aa10 source/common/x86/sad-a.asm
--- a/source/common/x86/sad-a.asm	Tue Oct 29 11:27:02 2013 +0530
+++ b/source/common/x86/sad-a.asm	Tue Oct 29 12:16:50 2013 +0530
@@ -277,6 +277,48 @@
     movd    eax, m0
     RET
 
+;-----------------------------------------------------------------------------
+; int pixel_sad_16x64( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+cglobal pixel_sad_16x64, 4,4,3
+    pxor m0, m0
+
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+    PROCESS_SAD_16x4
+
+    movu    m1,  [r2]
+    movu    m2,  [r2 + r3]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + r1]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    lea     r2,  [r2 + 2 * r3]
+    lea     r0,  [r0 + 2 * r1]
+    movu    m1,  [r2]
+    movu    m2,  [r2 + r3]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + r1]
+    paddd   m1,  m2
+    paddd   m0,  m1
+
+    movhlps m1, m0
+    paddd   m0, m1
+    movd    eax, m0
+    RET
+
 %endmacro
 
 INIT_XMM sse2