[x265] [PATCH Review Only] asm: assembly code for pixel_sad_32x32

[dnyaneshwar at multicorewareinc.com]

# HG changeset patch
# User Dnyaneshwar Gorade <dnyaneshwar at multicorewareinc.com>
# Date 1383051195 -19800
#      Tue Oct 29 18:23:15 2013 +0530
# Node ID be5d44324d09e2c56628a19c819ed153ce51b26e
# Parent  816135f25182dd830d7f1bbe3530ff0bf53b2f71
asm: assembly code for pixel_sad_32x32

diff -r 816135f25182 -r be5d44324d09 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Tue Oct 29 18:21:28 2013 +0530
+++ b/source/common/x86/asm-primitives.cpp	Tue Oct 29 18:23:15 2013 +0530
@@ -240,6 +240,7 @@
 
         p.sad[LUMA_32x8 ]  = x265_pixel_sad_32x8_sse2;
         p.sad[LUMA_32x24]  = x265_pixel_sad_32x24_sse2;
+        p.sad[LUMA_32x32]  = x265_pixel_sad_32x32_sse2;
 
         ASSGN_SSE(sse2);
         INIT2(sad, _sse2);
diff -r 816135f25182 -r be5d44324d09 source/common/x86/sad-a.asm
--- a/source/common/x86/sad-a.asm	Tue Oct 29 18:21:28 2013 +0530
+++ b/source/common/x86/sad-a.asm	Tue Oct 29 18:23:15 2013 +0530
@@ -446,6 +446,56 @@
     movd    eax, m0
     RET
 
+;-----------------------------------------------------------------------------
+; int pixel_sad_32x32( uint8_t *, intptr_t, uint8_t *, intptr_t )
+;-----------------------------------------------------------------------------
+cglobal pixel_sad_32x32, 4,4,3
+    pxor  m0,  m0
+
+    PROCESS_SAD_32x4
+    PROCESS_SAD_32x4
+    PROCESS_SAD_32x4
+    PROCESS_SAD_32x4
+    PROCESS_SAD_32x4
+    PROCESS_SAD_32x4
+    PROCESS_SAD_32x4
+
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    paddd   m1,  m2
+    paddd   m0,  m1
+    lea     r2,  [r2 + r3]
+    lea     r0,  [r0 + r1]
+    movu    m1,  [r2]
+    movu    m2,  [r2 + 16]
+    psadbw  m1,  [r0]
+    psadbw  m2,  [r0 + 16]
+    paddd   m1,  m2
+    paddd   m0,  m1
+
+    movhlps m1,  m0
+    paddd   m0,  m1
+    movd    eax, m0
+    RET
+
 %endmacro
 
 INIT_XMM sse2