[x265] [PATCH Review only] asm: chroma_vpp[4x4] for color space i420 in avx2: improve 228c->186c

Thu Nov 27 18:34:03 CET 2014

I haven't haswell now, the code seem right, I will test it at next monday.
In 4x4, I suggest modify algorithm, eg:

movd 0
pinsrd 1
pinsrd 2
pinsrd 3
pshufb  -> [33 23 13 03 - 32 22 12 02 - 31 21 11 01 - 30 20 10 00]

At 2014-11-27 19:24:04,"Divya Manivannan" <divya at multicorewareinc.com> wrote:
># HG changeset patch ># User Divya Manivannan <divya at multicorewareinc.com> ># Date 1417087358 -19800 >#      Thu Nov 27 16:52:38 2014 +0530 ># Node ID 887d458dbe264afd5e8904c607c27a17309dc2e7 ># Parent  973662a5e779d1760af93fc713606bc923155ec6 >asm: chroma_vpp[4x4] for color space i420 in avx2: improve 228c->186c > >diff -r 973662a5e779 -r 887d458dbe26 source/common/x86/asm-primitives.cpp >--- a/source/common/x86/asm-primitives.cpp Thu Nov 27 11:19:16 2014 +0530 >+++ b/source/common/x86/asm-primitives.cpp Thu Nov 27 16:52:38 2014 +0530 >@@ -1856,6 +1856,9 @@ >         p.luma_vpp[LUMA_8x8] = x265_interp_8tap_vert_pp_8x8_avx2; >         p.luma_vpp[LUMA_8x16] = x265_interp_8tap_vert_pp_8x16_avx2; >         p.luma_vpp[LUMA_8x32] = x265_interp_8tap_vert_pp_8x32_avx2; >+ >+        p.chroma[X265_CSP_I420].filter_vpp[CHROMA_4x4] = x265_interp_4tap_vert_pp_4x4_avx2; >+>     } > #endif // if HIGH_BIT_DEPTH> } >diff -r 973662a5e779 -r 887d458dbe26 source/common/x86/ipfilter8.asm >--- a/source/common/x86/ipfilter8.asm Thu Nov 27 11:19:16 2014 +0530 >+++ b/source/common/x86/ipfilter8.asm Thu Nov 27 16:52:38 2014 +0530 >@@ -1901,6 +1901,56 @@> > RET>  >+INIT_YMM avx2 >+cglobal interp_4tap_vert_pp_4x4, 4, 6, 6 >+    mov             r4d, r4m >+    sub             r0, r1 >+>+%ifdef PIC >+    lea             r5, [tab_ChromaCoeff] >+    vpbroadcastd    m0, [r5 + r4 * 4] >+%else >+    vpbroadcastd    m0, [tab_ChromaCoeff + r4 * 4] >+%endif>+ >+    lea             r5, [r1 * 3] >+    lea             r4, [r3 * 3] >+ >+    movd            xm1, [r0]                       ; m1 = row0 >+    movd            xm2, [r0 + r1]                  ; m2 = row1 >+    punpcklbw       xm1, xm2                        ; m1 = [13 03 12 02 11 01 10 00] >+ >+    movd            xm3, [r0 + r1 * 2]              ; m3 = row2 >+    punpcklbw       xm2, xm3                        ; m2 = [23 13 22 12 21 11 20 10] >+    movd            xm4, [r0 + r5] >+    punpcklbw       xm3, xm4                        ; m3 = [33 23 32 22 31 21 30 20] >+    punpcklwd       xm1, xm3                        ; m1 = [33 23 13 03 32 22 12 02 31 21 11 01 30 20 10 00] >+ >+    lea             r0, [r0 + r1 * 4] >+    movd            xm5, [r0]                       ; m5 = row4 >+    punpcklbw       xm4, xm5                        ; m4 = [43 33 42 32 41 31 40 30] >+    punpcklwd       xm2, xm4                        ; m2 = [43 33 21 13 42 32 22 12 41 31 21 11 40 30 20 10] >+    vinserti128     m1, m1, xm2, 1                  ; m1 = [43 33 21 13 42 32 22 12 41 31 21 11 40 30 20 10] - [33 23 13 03 32 22 12 02 31 21 11 01 30 20 10 00] >+    movd            xm2, [r0 + r1]                  ; m2 = row5 >+    punpcklbw       xm5, xm2                        ; m5 = [53 43 52 42 51 41 50 40] >+    punpcklwd       xm3, xm5                        ; m3 = [53 43 44 23 52 42 32 22 51 41 31 21 50 40 30 20] >+    movd            xm5, [r0 + r1 * 2]              ; m5 = row6 >+    punpcklbw       xm2, xm5                        ; m2 = [63 53 62 52 61 51 60 50] >+    punpcklwd       xm4, xm2                        ; m4 = [63 53 43 33 62 52 42 32 61 51 41 31 60 50 40 30] >+    vinserti128     m3, m3, xm4, 1                  ; m3 = [63 53 43 33 62 52 42 32 61 51 41 31 60 50 40 30] - [53 43 44 23 52 42 32 22 51 41 31 21 50 40 30 20] >+ >+    pmaddubsw       m1, m0                          ; m1 = DQWORD ROW[1 0] >+    pmaddubsw       m3, m0                          ; m3 = DQWORD ROW[3 2] >+    phaddw          m1, m3                          ; m1 = WORD ROW[3 1 2 0] >+    pmulhrsw        m1, [pw_512] >+    vextracti128    xm2, m1, 1 >+    packuswb        xm1, xm2 >+    movd            [r2], xm1 >+    pextrd          [r2 + r3], xm1, 2 >+    pextrd          [r2 + r3 * 2], xm1, 1 >+    pextrd          [r2 + r4], xm1, 3 >+    RET>+ > ;----------------------------------------------------------------------------- > ; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx) > ;----------------------------------------------------------------------------- >diff -r 973662a5e779 -r 887d458dbe26 source/common/x86/ipfilter8.h >--- a/source/common/x86/ipfilter8.h Thu Nov 27 11:19:16 2014 +0530 >+++ b/source/common/x86/ipfilter8.h Thu Nov 27 16:52:38 2014 +0530 >@@ -573,6 +573,7 @@ >     SETUP_CHROMA_SS_FUNC_DEF(16, 64, cpu); > > CHROMA_FILTERS(_sse4);>+CHROMA_FILTERS(_avx2); > CHROMA_SP_FILTERS(_sse2);> CHROMA_SP_FILTERS_SSE4(_sse4); > CHROMA_SS_FILTERS(_sse2); >_______________________________________________ >x265-devel mailing list>x265-devel at videolan.org >https://mailman.videolan.org/listinfo/x265-devel
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