[x265] [PATCH 01 of 11] asm: intra_pred_ang4_31, improved by ~43% over SSE4

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1427951064 -19800
#      Thu Apr 02 10:34:24 2015 +0530
# Node ID eda310281e672fbbe44afc751d3686073de1dcc3
# Parent  05739d7d823f3231bc65fd7dc9f614befea2880d
asm: intra_pred_ang4_31, improved by ~43% over SSE4

AVX2:
intra_ang_4x4[31]       8.37x    94.14           787.59

SSE4:
intra_ang_4x4[31]       4.73x    164.40          776.99

diff -r 05739d7d823f -r eda310281e67 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Wed Apr 01 17:46:05 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Thu Apr 02 10:34:24 2015 +0530
@@ -1610,6 +1610,7 @@
         p.cu[BLOCK_4x4].intra_pred[28] = x265_intra_pred_ang4_28_avx2;
         p.cu[BLOCK_4x4].intra_pred[29] = x265_intra_pred_ang4_29_avx2;
         p.cu[BLOCK_4x4].intra_pred[30] = x265_intra_pred_ang4_30_avx2;
+        p.cu[BLOCK_4x4].intra_pred[31] = x265_intra_pred_ang4_31_avx2;
         p.cu[BLOCK_8x8].intra_pred[3] = x265_intra_pred_ang8_3_avx2;
         p.cu[BLOCK_8x8].intra_pred[33] = x265_intra_pred_ang8_33_avx2;
         p.cu[BLOCK_8x8].intra_pred[4] = x265_intra_pred_ang8_4_avx2;
diff -r 05739d7d823f -r eda310281e67 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Wed Apr 01 17:46:05 2015 +0530
+++ b/source/common/x86/intrapred.h	Thu Apr 02 10:34:24 2015 +0530
@@ -178,6 +178,7 @@
 void x265_intra_pred_ang4_28_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_29_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_30_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang4_31_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_3_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_33_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_4_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r 05739d7d823f -r eda310281e67 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Wed Apr 01 17:46:05 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Thu Apr 02 10:34:24 2015 +0530
@@ -514,12 +514,13 @@
 intra_pred_shuff_0_4:    times 4 db 0, 1, 1, 2, 2, 3, 3, 4
 intra_pred4_shuff1:      db 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5
 intra_pred4_shuff2:      db 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 1, 2, 2, 3, 3, 4, 4, 5
+intra_pred4_shuff31:     db 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 1, 2, 2, 3, 3, 4, 4, 5, 2, 3, 3, 4, 4, 5, 5, 6
 
 c_ang4_mode_27:          db 30, 2, 30, 2, 30, 2, 30, 2, 28, 4, 28, 4, 28, 4, 28, 4, 26, 6, 26, 6, 26, 6, 26, 6, 24, 8, 24, 8, 24, 8, 24, 8
 c_ang4_mode_28:          db 27, 5, 27, 5, 27, 5, 27, 5, 22, 10, 22, 10, 22, 10, 22, 10, 17, 15, 17, 15, 17, 15, 17, 15, 12, 20, 12, 20, 12, 20, 12, 20
 c_ang4_mode_29:          db 23, 9, 23, 9, 23, 9, 23, 9, 14, 18, 14, 18, 14, 18, 14, 18, 5, 27, 5, 27, 5, 27, 5, 27, 28, 4, 28, 4, 28, 4, 28, 4
 c_ang4_mode_30:          db 19, 13, 19, 13, 19, 13, 19, 13, 6, 26, 6, 26, 6, 26, 6, 26, 25, 7, 25, 7, 25, 7, 25, 7, 12, 20, 12, 20, 12, 20, 12, 20
-
+c_ang4_mode_31:          db 15, 17, 15, 17, 15, 17, 15, 17, 30, 2, 30, 2, 30, 2, 30, 2, 13, 19, 13, 19, 13, 19, 13, 19, 28, 4, 28, 4, 28, 4, 28, 4
 ALIGN 32
 ;; (blkSize - 1 - x)
 pw_planar4_0:         dw 3,  2,  1,  0,  3,  2,  1,  0
@@ -15543,3 +15544,19 @@
     movd              [r0], xm0
     pextrd            [r0 + r1], xm0, 1
     RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang4_31, 3, 3, 1
+    vbroadcasti128    m0, [r2 + 1]
+    pshufb            m0, [intra_pred4_shuff31]
+    pmaddubsw         m0, [c_ang4_mode_31]
+    pmulhrsw          m0, [pw_1024]
+    packuswb          m0, m0
+
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    vextracti128      xm0, m0, 1
+    lea               r0, [r0 + 2 * r1]
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    RET