[x265] [PATCH 02 of 11] asm: intra_pred_ang4_32 improved by ~47% over SSE4

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1427951840 -19800
#      Thu Apr 02 10:47:20 2015 +0530
# Node ID 46a501f29b887264074341b1432135e5539d27c5
# Parent  eda310281e672fbbe44afc751d3686073de1dcc3
asm: intra_pred_ang4_32 improved by ~47% over SSE4

AVX2:
intra_ang_4x4[32]       8.80x    90.08           793.05

SSE4:
intra_ang_4x4[32]       4.65x    170.02          791.00

diff -r eda310281e67 -r 46a501f29b88 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu Apr 02 10:34:24 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Thu Apr 02 10:47:20 2015 +0530
@@ -1611,6 +1611,7 @@
         p.cu[BLOCK_4x4].intra_pred[29] = x265_intra_pred_ang4_29_avx2;
         p.cu[BLOCK_4x4].intra_pred[30] = x265_intra_pred_ang4_30_avx2;
         p.cu[BLOCK_4x4].intra_pred[31] = x265_intra_pred_ang4_31_avx2;
+        p.cu[BLOCK_4x4].intra_pred[32] = x265_intra_pred_ang4_32_avx2;
         p.cu[BLOCK_8x8].intra_pred[3] = x265_intra_pred_ang8_3_avx2;
         p.cu[BLOCK_8x8].intra_pred[33] = x265_intra_pred_ang8_33_avx2;
         p.cu[BLOCK_8x8].intra_pred[4] = x265_intra_pred_ang8_4_avx2;
diff -r eda310281e67 -r 46a501f29b88 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Thu Apr 02 10:34:24 2015 +0530
+++ b/source/common/x86/intrapred.h	Thu Apr 02 10:47:20 2015 +0530
@@ -179,6 +179,7 @@
 void x265_intra_pred_ang4_29_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_30_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_31_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang4_32_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_3_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_33_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_4_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r eda310281e67 -r 46a501f29b88 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Thu Apr 02 10:34:24 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Thu Apr 02 10:47:20 2015 +0530
@@ -521,6 +521,8 @@
 c_ang4_mode_29:          db 23, 9, 23, 9, 23, 9, 23, 9, 14, 18, 14, 18, 14, 18, 14, 18, 5, 27, 5, 27, 5, 27, 5, 27, 28, 4, 28, 4, 28, 4, 28, 4
 c_ang4_mode_30:          db 19, 13, 19, 13, 19, 13, 19, 13, 6, 26, 6, 26, 6, 26, 6, 26, 25, 7, 25, 7, 25, 7, 25, 7, 12, 20, 12, 20, 12, 20, 12, 20
 c_ang4_mode_31:          db 15, 17, 15, 17, 15, 17, 15, 17, 30, 2, 30, 2, 30, 2, 30, 2, 13, 19, 13, 19, 13, 19, 13, 19, 28, 4, 28, 4, 28, 4, 28, 4
+c_ang4_mode_32:          db 11, 21, 11, 21, 11, 21, 11, 21, 22, 10, 22, 10, 22, 10, 22, 10, 1, 31, 1, 31, 1, 31, 1, 31, 12, 20, 12, 20, 12, 20, 12, 20
+
 ALIGN 32
 ;; (blkSize - 1 - x)
 pw_planar4_0:         dw 3,  2,  1,  0,  3,  2,  1,  0
@@ -15560,3 +15562,19 @@
     movd              [r0], xm0
     pextrd            [r0 + r1], xm0, 1
     RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang4_32, 3, 3, 1
+    vbroadcasti128    m0, [r2 + 1]
+    pshufb            m0, [intra_pred4_shuff31]
+    pmaddubsw         m0, [c_ang4_mode_32]
+    pmulhrsw          m0, [pw_1024]
+    packuswb          m0, m0
+
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    vextracti128      xm0, m0, 1
+    lea               r0, [r0 + 2 * r1]
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    RET