[x265] [PATCH 04 of 11] asm: intra_pred_ang4_24 improved by ~38% over SSE4

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1427954234 -19800
#      Thu Apr 02 11:27:14 2015 +0530
# Node ID ee8d89f8caec8b9937b486a02bbb991636e6774f
# Parent  ac65d39da56579d6b45ac09c0ed7a55af4ff1856
asm: intra_pred_ang4_24 improved by ~38% over SSE4

AVX2:
intra_ang_4x4[24]       9.48x    90.10           854.38

SSE4:
intra_ang_4x4[24]       5.93x    145.08          860.60

diff -r ac65d39da565 -r ee8d89f8caec source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu Apr 02 11:08:10 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Thu Apr 02 11:27:14 2015 +0530
@@ -1606,6 +1606,7 @@
         p.weight_pp = x265_weight_pp_avx2;
 
         // intra_pred functions
+        p.cu[BLOCK_4x4].intra_pred[24] = x265_intra_pred_ang4_24_avx2;
         p.cu[BLOCK_4x4].intra_pred[27] = x265_intra_pred_ang4_27_avx2;
         p.cu[BLOCK_4x4].intra_pred[28] = x265_intra_pred_ang4_28_avx2;
         p.cu[BLOCK_4x4].intra_pred[29] = x265_intra_pred_ang4_29_avx2;
diff -r ac65d39da565 -r ee8d89f8caec source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Thu Apr 02 11:08:10 2015 +0530
+++ b/source/common/x86/intrapred.h	Thu Apr 02 11:27:14 2015 +0530
@@ -174,6 +174,7 @@
 DECL_ANG(32, 33, sse4);
 
 #undef DECL_ANG
+void x265_intra_pred_ang4_24_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_27_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_28_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_29_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r ac65d39da565 -r ee8d89f8caec source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Thu Apr 02 11:08:10 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Thu Apr 02 11:27:14 2015 +0530
@@ -524,6 +524,7 @@
 c_ang4_mode_31:          db 15, 17, 15, 17, 15, 17, 15, 17, 30, 2, 30, 2, 30, 2, 30, 2, 13, 19, 13, 19, 13, 19, 13, 19, 28, 4, 28, 4, 28, 4, 28, 4
 c_ang4_mode_32:          db 11, 21, 11, 21, 11, 21, 11, 21, 22, 10, 22, 10, 22, 10, 22, 10, 1, 31, 1, 31, 1, 31, 1, 31, 12, 20, 12, 20, 12, 20, 12, 20
 c_ang4_mode_33:          db 6, 26, 6, 26, 6, 26, 6, 26, 12, 20, 12, 20, 12, 20, 12, 20, 18, 14, 18, 14, 18, 14, 18, 14, 24, 8, 24, 8, 24, 8, 24, 8
+c_ang4_mode_24:          db 5, 27, 5, 27, 5, 27, 5, 27, 10, 22, 10, 22, 10, 22, 10, 22, 15, 17, 15, 17, 15, 17, 15, 17, 20, 12, 20, 12, 20, 12, 20, 12
 
 ALIGN 32
 ;; (blkSize - 1 - x)
@@ -15596,3 +15597,19 @@
     movd              [r0], xm0
     pextrd            [r0 + r1], xm0, 1
     RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang4_24, 3, 3, 1
+    vbroadcasti128    m0, [r2]
+    pshufb            m0, [intra_pred_shuff_0_4]
+    pmaddubsw         m0, [c_ang4_mode_24]
+    pmulhrsw          m0, [pw_1024]
+    packuswb          m0, m0
+
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    vextracti128      xm0, m0, 1
+    lea               r0, [r0 + 2 * r1]
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    RET