[x265] [PATCH 4 of 7] asm-intra_pred_ang16_27: improved, 645.84c -> 415.14c over SSE4 asm code
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Mon Mar 16 05:55:33 CET 2015
# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1426250858 -19800
# Node ID 986aec8f2698250888d4c639542c5f6500edc60d
# Parent 941beb5c0de477698d1cdfe83a27eb1786edc107
asm-intra_pred_ang16_27: improved, 645.84c -> 415.14c over SSE4 asm code
AVX2:
intra_ang_16x16[27] 21.17x 415.14 8789.72
SSE4:
intra_ang_16x16[27] 13.68x 645.84 8833.49
diff -r 941beb5c0de4 -r 986aec8f2698 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri Mar 13 14:28:43 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Fri Mar 13 18:17:38 2015 +0530
@@ -1508,6 +1508,7 @@
p.cu[BLOCK_8x8].intra_pred[11] = x265_intra_pred_ang8_11_avx2;
p.cu[BLOCK_16x16].intra_pred[25] = x265_intra_pred_ang16_25_avx2;
p.cu[BLOCK_16x16].intra_pred[28] = x265_intra_pred_ang16_28_avx2;
+ p.cu[BLOCK_16x16].intra_pred[27] = x265_intra_pred_ang16_27_avx2;
// copy_sp primitives
p.cu[BLOCK_16x16].copy_sp = x265_blockcopy_sp_16x16_avx2;
diff -r 941beb5c0de4 -r 986aec8f2698 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h Fri Mar 13 14:28:43 2015 +0530
+++ b/source/common/x86/intrapred.h Fri Mar 13 18:17:38 2015 +0530
@@ -185,6 +185,7 @@
void x265_intra_pred_ang8_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang16_25_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang16_28_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang16_27_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_all_angs_pred_4x4_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
void x265_all_angs_pred_8x8_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
void x265_all_angs_pred_16x16_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
diff -r 941beb5c0de4 -r 986aec8f2698 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm Fri Mar 13 14:28:43 2015 +0530
+++ b/source/common/x86/intrapred8.asm Fri Mar 13 18:17:38 2015 +0530
@@ -2,6 +2,7 @@
;* Copyright (C) 2013 x265 project
;*
;* Authors: Min Chen <chenm003 at 163.com> <min.chen at multicorewareinc.com>
+;* Praveen Kumar Tiwari <praveen at multicorewareinc.com>
;*
;* This program is free software; you can redistribute it and/or modify
;* it under the terms of the GNU General Public License as published by
@@ -134,6 +135,21 @@
db 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6
db 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16
+
+ALIGN 32
+c_ang16_mode_27: db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4
+ db 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8
+ db 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12
+ db 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16
+ db 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20
+ db 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24
+ db 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28
+ db 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30
+ db 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0
+
+ALIGN 32
+intra_pred_shuff_0_15: db 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15
+
ALIGN 32
;; (blkSize - 1 - x)
pw_planar4_0: dw 3, 2, 1, 0, 3, 2, 1, 0
@@ -10778,3 +10794,40 @@
INTRA_PRED_ANG16_MC1 2
RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang16_27, 3, 5, 5
+ mova m0, [pw_1024]
+ lea r3, [3 * r1]
+ lea r4, [c_ang16_mode_27]
+
+ vbroadcasti128 m1, [r2 + 1]
+ pshufb m1, [intra_pred_shuff_0_8]
+ vbroadcasti128 m2, [r2 + 9]
+ pshufb m2, [intra_pred_shuff_0_8]
+
+ INTRA_PRED_ANG16_MC1 0
+
+ lea r0, [r0 + 4 * r1]
+ INTRA_PRED_ANG16_MC1 2
+
+ lea r0, [r0 + 4 * r1]
+ lea r4, [r4 + 4 * mmsize]
+ INTRA_PRED_ANG16_MC1 0
+
+ lea r0, [r0 + 4 * r1]
+ INTRA_PRED_ANG16_MC0 r0, r0 + r1, 2
+
+ vperm2i128 m1, m1, m2, 00100000b
+ pmaddubsw m3, m1, [r4 + 3 * mmsize]
+ pmulhrsw m3, m0
+ vbroadcasti128 m2, [r2 + 2]
+ pshufb m2, [intra_pred_shuff_0_15]
+ pmaddubsw m2, [r4 + 4 * mmsize]
+ pmulhrsw m2, m0
+ packuswb m3, m2
+ vpermq m3, m3, 11011000b
+ movu [r0 + 2 * r1], xm3
+ vextracti128 xm4, m3, 1
+ movu [r0 + r3], xm4
+ RET
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