[x265] [PATCH 5 of 5] asm: interp_4tap_vert_pp sse2

dtyx265 at gmail.com dtyx265 at gmail.com
Fri May 8 22:57:16 CEST 2015


# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1431118502 25200
# Node ID 81a0388ef700c1e773c1b9af3a500c515e27bcc3
# Parent  6dc172cd4d9d6625d0b2d6d114616c1ee664c83b
asm: interp_4tap_vert_pp sse2

This replaces c code for 8x2, 8x4 and 8x6 for 64-bit only

64-bit

./test/TestBench --testbench interp | grep vpp | grep " 8x"
chroma_vpp[  8x4]	3.97x 	 1047.50  	 4161.69
chroma_vpp[  8x6]	3.95x 	 1559.98  	 6161.25
chroma_vpp[  8x2]	3.71x 	 560.00   	 2077.42
chroma_vpp[  8x4]	3.91x 	 1065.00  	 4160.75
chroma_vpp[  8x4]	3.91x 	 1064.90  	 4160.91

diff -r 6dc172cd4d9d -r 81a0388ef700 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri May 08 13:43:25 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp	Fri May 08 13:55:02 2015 -0700
@@ -1386,7 +1386,12 @@
         p.chroma[X265_CSP_I444].pu[LUMA_4x16].filter_vpp = x265_interp_4tap_vert_pp_4x16_sse2;
 #if X86_64
         p.chroma[X265_CSP_I420].pu[CHROMA_420_6x8].filter_vpp = x265_interp_4tap_vert_pp_6x8_sse2;
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vpp = x265_interp_4tap_vert_pp_8x2_sse2;
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_8x6].filter_vpp = x265_interp_4tap_vert_pp_8x6_sse2;
         p.chroma[X265_CSP_I422].pu[CHROMA_422_6x16].filter_vpp = x265_interp_4tap_vert_pp_6x16_sse2;
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
+        p.chroma[X265_CSP_I444].pu[LUMA_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
 #endif
 
         ALL_LUMA_PU(luma_hpp, interp_8tap_horiz_pp, sse2);
diff -r 6dc172cd4d9d -r 81a0388ef700 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm	Fri May 08 13:43:25 2015 -0700
+++ b/source/common/x86/ipfilter8.asm	Fri May 08 13:55:02 2015 -0700
@@ -1527,6 +1527,213 @@
 %endif
 
 ;-----------------------------------------------------------------------------
+; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W8_sse2 1
+INIT_XMM sse2
+cglobal interp_4tap_vert_pp_8x%1, 4, 7, 12
+
+    mov         r4d,       r4m
+    sub         r0,        r1
+    shl         r4d,       5
+    pxor        m9,        m9
+    mova        m4,        [pw_32]
+
+%ifdef PIC
+    lea         r6,        [tab_ChromaCoeffV]
+    mova        m6,        [r6 + r4]
+    mova        m5,        [r6 + r4 + 16]
+%else
+    mova        m6,        [tab_ChromaCoeffV + r4]
+    mova        m5,        [tab_ChromaCoeffV + r4 + 16]
+%endif
+
+    movq        m0,        [r0]
+    movq        m1,        [r0 + r1]
+    movq        m2,        [r0 + 2 * r1]
+    lea         r5,        [r0 + 2 * r1]
+    movq        m3,        [r5 + r1]
+
+    punpcklbw   m0,        m1
+    punpcklbw   m7,        m2,          m3
+
+    movhlps     m8,        m0
+    punpcklbw   m0,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m0,        m6
+    pmaddwd     m8,        m6
+    packssdw    m0,        m8
+
+    movhlps     m8,        m7
+    punpcklbw   m7,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m7,        m5
+    pmaddwd     m8,        m5
+    packssdw    m7,        m8
+
+    paddw       m0,        m7
+
+    paddw       m0,        m4
+    psraw       m0,        6
+
+    movq        m11,        [r0 + 4 * r1]
+
+    punpcklbw   m1,        m2
+    punpcklbw   m7,        m3,        m11
+
+    movhlps     m8,        m1
+    punpcklbw   m1,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m1,        m6
+    pmaddwd     m8,        m6
+    packssdw    m1,        m8
+
+    movhlps     m8,        m7
+    punpcklbw   m7,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m7,        m5
+    pmaddwd     m8,        m5
+    packssdw    m7,        m8
+
+    paddw       m1,        m7
+
+    paddw       m1,        m4
+    psraw       m1,        6
+    packuswb    m1,        m0
+
+    movhps      [r2],      m1
+    movh        [r2 + r3], m1
+%if %1 == 2     ;end of 8x2
+    RET
+
+%else
+    lea         r6,        [r0 + 4 * r1]
+    movq        m1,        [r6 + r1]
+
+    punpcklbw   m2,        m3
+    punpcklbw   m7,        m11,        m1
+
+    movhlps     m8,        m2
+    punpcklbw   m2,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m2,        m6
+    pmaddwd     m8,        m6
+    packssdw    m2,        m8
+
+    movhlps     m8,        m7
+    punpcklbw   m7,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m7,        m5
+    pmaddwd     m8,        m5
+    packssdw    m7,        m8
+
+    paddw       m2,        m7
+
+    paddw       m2,        m4
+    psraw       m2,        6
+
+    movq        m10,        [r6 + 2 * r1]
+
+    punpcklbw   m3,        m11
+    punpcklbw   m7,        m1,        m10
+
+    movhlps     m8,        m3
+    punpcklbw   m3,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m3,        m6
+    pmaddwd     m8,        m6
+    packssdw    m3,        m8
+
+    movhlps     m8,        m7
+    punpcklbw   m7,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m7,        m5
+    pmaddwd     m8,        m5
+    packssdw    m7,        m8
+
+    paddw       m3,        m7
+
+    paddw       m3,        m4
+    psraw       m3,        6
+    packuswb    m3,        m2
+
+    movhps      [r2 + 2 * r3], m3
+    lea         r5,        [r2 + 2 * r3]
+    movh        [r5 + r3], m3
+%if %1 == 4     ;end of 8x4
+    RET
+
+%else
+    lea         r6,        [r6 + 2 * r1]
+    movq        m3,        [r6 + r1]
+
+    punpcklbw   m11,        m1
+    punpcklbw   m7,        m10,        m3
+
+    movhlps     m8,        m11
+    punpcklbw   m11,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m11,        m6
+    pmaddwd     m8,        m6
+    packssdw    m11,        m8
+
+    movhlps     m8,        m7
+    punpcklbw   m7,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m7,        m5
+    pmaddwd     m8,        m5
+    packssdw    m7,        m8
+
+    paddw       m11,        m7
+
+    paddw       m11,        m4
+    psraw       m11,        6
+
+    movq        m7,        [r0 + 8 * r1]
+
+    punpcklbw   m1,        m10
+    punpcklbw   m3,        m7
+
+    movhlps     m8,        m1
+    punpcklbw   m1,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m1,        m6
+    pmaddwd     m8,        m6
+    packssdw    m1,        m8
+
+    movhlps     m8,        m3
+    punpcklbw   m3,        m9
+    punpcklbw   m8,        m9
+    pmaddwd     m3,        m5
+    pmaddwd     m8,        m5
+    packssdw    m3,        m8
+
+    paddw       m1,        m3
+
+    paddw       m1,        m4
+    psraw       m1,        6
+    packuswb    m1,        m11
+
+    movhps      [r2 + 4 * r3], m1
+    lea         r5,        [r2 + 4 * r3]
+    movh        [r5 + r3], m1
+%if %1 == 6
+    RET
+
+%else
+  %error INVALID macro argument, only 2, 4 or 6!
+%endif
+%endif
+%endif
+%endmacro
+
+%if ARCH_X86_64
+    FILTER_V4_W8_sse2 2
+    FILTER_V4_W8_sse2 4
+    FILTER_V4_W8_sse2 6
+%endif
+
+;-----------------------------------------------------------------------------
 ; void interp_4tap_horiz_pp_2x4(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
 ;-----------------------------------------------------------------------------
 INIT_XMM sse4
diff -r 6dc172cd4d9d -r 81a0388ef700 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h	Fri May 08 13:43:25 2015 -0700
+++ b/source/common/x86/ipfilter8.h	Fri May 08 13:55:02 2015 -0700
@@ -916,6 +916,9 @@
 #ifdef X86_64
 void x265_interp_4tap_vert_pp_6x8_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
 void x265_interp_4tap_vert_pp_6x16_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x2_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x4_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x6_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
 #endif
 #undef LUMA_FILTERS
 #undef LUMA_SP_FILTERS


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