[x265] [PATCH 08 of 12] asm: interp_4tap_vert_ps_16xN sse2
dtyx265 at gmail.com
dtyx265 at gmail.com
Tue May 19 02:24:35 CEST 2015
# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1431993530 25200
# Node ID b518e087f849d391dafab2e3f3aa50c8b211fa3b
# Parent 1041ae2d7f4d9f005a36fbcbf6cfeeee752d480c
asm: interp_4tap_vert_ps_16xN sse2
Converted vert_pp_16xN macro to also create ps primitives. This replaces c code for ps with minimal impact on pp.
64-bit
./test/TestBench --testbench interp | grep vp | grep "\[16x"
chroma_vpp[16x16] 3.91x 8234.99 32229.99
chroma_vps[16x16] 3.14x 7600.04 23827.74
chroma_vpp[16x32] 3.93x 16395.00 64447.85
chroma_vps[16x32] 2.98x 15865.00 47348.17
chroma_vpp[16x12] 3.81x 6375.00 24269.99
chroma_vps[16x12] 3.06x 5868.12 17947.48
chroma_vpp[16x32] 3.84x 16697.89 64182.48
chroma_vps[16x32] 3.14x 15186.57 47660.69
chroma_vpp[16x16] 3.84x 8475.00 32518.77
chroma_vps[16x16] 2.98x 7985.02 23827.97
chroma_vpp[16x64] 3.92x 32827.91 128766.97
chroma_vps[16x64] 3.00x 31668.02 94916.32
chroma_vpp[16x24] 3.92x 12321.70 48239.99
chroma_vps[16x24] 3.13x 11360.00 35587.48
chroma_vpp[16x16] 3.84x 8474.99 32530.20
chroma_vps[16x16] 2.98x 7984.98 23827.48
chroma_vpp[16x32] 3.82x 16875.01 64465.08
chroma_vps[16x32] 3.07x 15427.55 47348.00
chroma_vpp[16x12] 3.85x 6375.00 24550.31
chroma_vps[16x12] 2.98x 6015.00 17947.83
chroma_vpp[16x64] 3.87x 33162.68 128321.43
chroma_vps[16x64] 3.13x 30232.05 94663.36
diff -r 1041ae2d7f4d -r b518e087f849 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Mon May 18 16:54:35 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp Mon May 18 16:58:50 2015 -0700
@@ -1528,6 +1528,11 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vps = x265_interp_4tap_vert_ps_8x16_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x32].filter_vps = x265_interp_4tap_vert_ps_8x32_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_12x16].filter_vps = x265_interp_4tap_vert_ps_12x16_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x4].filter_vps = x265_interp_4tap_vert_ps_16x4_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x8].filter_vps = x265_interp_4tap_vert_ps_16x8_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_vps = x265_interp_4tap_vert_ps_16x12_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_vps = x265_interp_4tap_vert_ps_16x16_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_6x16].filter_vps = x265_interp_4tap_vert_ps_6x16_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x8].filter_vps = x265_interp_4tap_vert_ps_8x8_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x12].filter_vps = x265_interp_4tap_vert_ps_8x12_sse2;
@@ -1535,11 +1540,22 @@
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x32].filter_vps = x265_interp_4tap_vert_ps_8x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x64].filter_vps = x265_interp_4tap_vert_ps_8x64_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_12x32].filter_vps = x265_interp_4tap_vert_ps_12x32_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x8].filter_vps = x265_interp_4tap_vert_ps_16x8_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x16].filter_vps = x265_interp_4tap_vert_ps_16x16_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x24].filter_vps = x265_interp_4tap_vert_ps_16x24_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_16x64].filter_vps = x265_interp_4tap_vert_ps_16x64_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x4].filter_vps = x265_interp_4tap_vert_ps_8x4_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x8].filter_vps = x265_interp_4tap_vert_ps_8x8_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x16].filter_vps = x265_interp_4tap_vert_ps_8x16_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x32].filter_vps = x265_interp_4tap_vert_ps_8x32_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_12x16].filter_vps = x265_interp_4tap_vert_ps_12x16_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_16x4].filter_vps = x265_interp_4tap_vert_ps_16x4_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_16x8].filter_vps = x265_interp_4tap_vert_ps_16x8_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_16x12].filter_vps = x265_interp_4tap_vert_ps_16x12_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_16x16].filter_vps = x265_interp_4tap_vert_ps_16x16_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_16x64].filter_vps = x265_interp_4tap_vert_ps_16x64_sse2;
#endif
ALL_LUMA_PU(luma_hpp, interp_8tap_horiz_pp, sse2);
diff -r 1041ae2d7f4d -r b518e087f849 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Mon May 18 16:54:35 2015 -0700
+++ b/source/common/x86/ipfilter8.asm Mon May 18 16:58:50 2015 -0700
@@ -2063,16 +2063,21 @@
%endif
;-----------------------------------------------------------------------------
-; void interp_4tap_vert_pp_16xN(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
-;-----------------------------------------------------------------------------
-%macro FILTER_V4_W16_H2_sse2 1
+; void interp_4tap_vert_%1_16x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W16_H2_sse2 2
INIT_XMM sse2
-cglobal interp_4tap_vert_pp_16x%1, 4, 6, 11
+cglobal interp_4tap_vert_%1_16x%2, 4, 6, 11
mov r4d, r4m
sub r0, r1
shl r4d, 5
pxor m9, m9
+
+%ifidn %1,pp
mova m6, [pw_32]
+%elifidn %1,ps
+ mova m6, [pw_2000]
+%endif
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
@@ -2084,7 +2089,7 @@
%endif
%assign x 1
-%rep %1/2
+%rep %2/2
movu m2, [r0]
movu m3, [r0 + r1]
@@ -2127,6 +2132,7 @@
packssdw m7, m8
paddw m4, m7
+%ifidn %1,pp
paddw m4, m6
psraw m4, 6
paddw m2, m6
@@ -2134,6 +2140,12 @@
packuswb m4, m2
movu [r2], m4
+%elifidn %1,ps
+ psubw m4, m6
+ psubw m2, m6
+ movu [r2], m4
+ movu [r2 + 16], m2
+%endif
punpcklbw m4, m3, m5
punpckhbw m3, m5
@@ -2174,17 +2186,27 @@
paddw m4, m2
paddw m3, m10
+%ifidn %1,pp
paddw m4, m6
psraw m4, 6
paddw m3, m6
psraw m3, 6
packuswb m4, m3
-
movu [r2 + r3], m4
-%if x < %1/2
+%if x < %2/2
lea r2, [r2 + 2 * r3]
%endif
+%elifidn %1,ps
+ psubw m4, m6
+ psubw m3, m6
+ movu [r2 + 2 * r3], m4
+ movu [r2 + 2 * r3 + 16], m3
+%if x < %2/2
+ lea r2, [r2 + 4 * r3]
+%endif
+%endif
+
%assign x x+1
%endrep
RET
@@ -2192,14 +2214,23 @@
%endmacro
%if ARCH_X86_64
- FILTER_V4_W16_H2_sse2 4
- FILTER_V4_W16_H2_sse2 8
- FILTER_V4_W16_H2_sse2 12
- FILTER_V4_W16_H2_sse2 16
- FILTER_V4_W16_H2_sse2 32
-
- FILTER_V4_W16_H2_sse2 24
- FILTER_V4_W16_H2_sse2 64
+ FILTER_V4_W16_H2_sse2 pp, 4
+ FILTER_V4_W16_H2_sse2 pp, 8
+ FILTER_V4_W16_H2_sse2 pp, 12
+ FILTER_V4_W16_H2_sse2 pp, 16
+ FILTER_V4_W16_H2_sse2 pp, 32
+
+ FILTER_V4_W16_H2_sse2 pp, 24
+ FILTER_V4_W16_H2_sse2 pp, 64
+
+ FILTER_V4_W16_H2_sse2 ps, 4
+ FILTER_V4_W16_H2_sse2 ps, 8
+ FILTER_V4_W16_H2_sse2 ps, 12
+ FILTER_V4_W16_H2_sse2 ps, 16
+ FILTER_V4_W16_H2_sse2 ps, 32
+
+ FILTER_V4_W16_H2_sse2 ps, 24
+ FILTER_V4_W16_H2_sse2 ps, 64
%endif
;-----------------------------------------------------------------------------
diff -r 1041ae2d7f4d -r b518e087f849 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Mon May 18 16:54:35 2015 -0700
+++ b/source/common/x86/ipfilter8.h Mon May 18 16:58:50 2015 -0700
@@ -966,6 +966,13 @@
void x265_interp_4tap_vert_ps_8x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_ps_12x16_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_ps_12x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_16x4_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_16x8_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_16x12_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_16x16_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_16x24_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_16x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_16x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
#endif
#undef LUMA_FILTERS
#undef LUMA_SP_FILTERS
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