[x265] [PATCH 09 of 12] asm: interp_4tap_vert_ps_24xN sse2
dtyx265 at gmail.com
dtyx265 at gmail.com
Tue May 19 02:24:36 CEST 2015
# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1431993738 25200
# Node ID a40fcb9a2fab1a4bd76e995b77a82779450e3082
# Parent b518e087f849d391dafab2e3f3aa50c8b211fa3b
asm: interp_4tap_vert_ps_24xN sse2
Converted vert_pp_24xN macro to also create ps primitives. This replaces c code for ps with minimal impact on pp.
64-bit
./test/TestBench --testbench interp | grep vp | grep "\[24x"
chroma_vpp[24x32] 7.38x 24750.83 182752.19
chroma_vps[24x32] 6.76x 23139.21 156334.78
chroma_vpp[24x64] 7.44x 49500.86 368042.72
chroma_vps[24x64] 6.84x 45956.26 314563.16
chroma_vpp[24x32] 7.39x 24685.91 182489.36
chroma_vps[24x32] 6.99x 22556.14 157638.64
diff -r b518e087f849 -r a40fcb9a2fab source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Mon May 18 16:58:50 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp Mon May 18 17:02:18 2015 -0700
@@ -1533,6 +1533,7 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_vps = x265_interp_4tap_vert_ps_16x12_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_vps = x265_interp_4tap_vert_ps_16x16_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_24x32].filter_vps = x265_interp_4tap_vert_ps_24x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_6x16].filter_vps = x265_interp_4tap_vert_ps_6x16_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x8].filter_vps = x265_interp_4tap_vert_ps_8x8_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x12].filter_vps = x265_interp_4tap_vert_ps_8x12_sse2;
@@ -1545,6 +1546,7 @@
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x24].filter_vps = x265_interp_4tap_vert_ps_16x24_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x64].filter_vps = x265_interp_4tap_vert_ps_16x64_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_24x64].filter_vps = x265_interp_4tap_vert_ps_24x64_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x4].filter_vps = x265_interp_4tap_vert_ps_8x4_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x8].filter_vps = x265_interp_4tap_vert_ps_8x8_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x16].filter_vps = x265_interp_4tap_vert_ps_8x16_sse2;
@@ -1556,6 +1558,7 @@
p.chroma[X265_CSP_I444].pu[LUMA_16x16].filter_vps = x265_interp_4tap_vert_ps_16x16_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_16x64].filter_vps = x265_interp_4tap_vert_ps_16x64_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_24x32].filter_vps = x265_interp_4tap_vert_ps_24x32_sse2;
#endif
ALL_LUMA_PU(luma_hpp, interp_8tap_horiz_pp, sse2);
diff -r b518e087f849 -r a40fcb9a2fab source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Mon May 18 16:58:50 2015 -0700
+++ b/source/common/x86/ipfilter8.asm Mon May 18 17:02:18 2015 -0700
@@ -2234,17 +2234,21 @@
%endif
;-----------------------------------------------------------------------------
-;void interp_4tap_vert_pp_24xN(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
-;-----------------------------------------------------------------------------
-%macro FILTER_V4_W24_sse2 1
+;void interp_4tap_vert_%1_24%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W24_sse2 2
INIT_XMM sse2
-cglobal interp_4tap_vert_pp_24x%1, 4, 6, 11
-
+cglobal interp_4tap_vert_%1_24x%2, 4, 6, 11
mov r4d, r4m
sub r0, r1
shl r4d, 5
pxor m9, m9
+
+%ifidn %1,pp
mova m6, [pw_32]
+%elifidn %1,ps
+ mova m6, [pw_2000]
+%endif
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
@@ -2256,7 +2260,7 @@
%endif
%assign x 1
-%rep %1/2
+%rep %2/2
movu m2, [r0]
movu m3, [r0 + r1]
@@ -2279,7 +2283,7 @@
lea r5, [r0 + 2 * r1]
movu m5, [r5]
- movu m10, [r5 + r1]
+ movu m10, [r5 + r1]
punpcklbw m7, m5, m10
movhlps m8, m7
@@ -2301,6 +2305,7 @@
paddw m2, m7
+%ifidn %1,pp
paddw m4, m6
psraw m4, 6
paddw m2, m6
@@ -2308,6 +2313,12 @@
packuswb m4, m2
movu [r2], m4
+%elifidn %1,ps
+ psubw m4, m6
+ psubw m2, m6
+ movu [r2], m4
+ movu [r2 + 16], m2
+%endif
punpcklbw m4, m3, m5
punpckhbw m3, m5
@@ -2329,7 +2340,7 @@
movu m2, [r5 + 2 * r1]
punpcklbw m5, m10, m2
- punpckhbw m10, m2
+ punpckhbw m10, m2
movhlps m8, m5
punpcklbw m5, m9
@@ -2348,13 +2359,20 @@
paddw m4, m5
paddw m3, m10
+%ifidn %1,pp
paddw m4, m6
psraw m4, 6
paddw m3, m6
psraw m3, 6
packuswb m4, m3
- movu [r2 + r3], m4
+ movu [r2 + r3], m4
+%elifidn %1,ps
+ psubw m4, m6
+ psubw m3, m6
+ movu [r2 + 2 * r3], m4
+ movu [r2 + 2 * r3 + 16], m3
+%endif
movq m2, [r0 + 16]
movq m3, [r0 + r1 + 16]
@@ -2380,8 +2398,13 @@
paddw m2, m4
+%ifidn %1,pp
paddw m2, m6
psraw m2, 6
+%elifidn %1,ps
+ psubw m2, m6
+ movu [r2 + 32], m2
+%endif
movq m3, [r0 + r1 + 16]
movq m4, [r5 + 16]
@@ -2407,16 +2430,26 @@
paddw m3, m5
+%ifidn %1,pp
paddw m3, m6
psraw m3, 6
packuswb m2, m3
movh [r2 + 16], m2
movhps [r2 + r3 + 16], m2
-
-%if x < %1/2
+%if x < %2/2
+ lea r2, [r2 + 2 * r3]
+%endif
+%elifidn %1,ps
+ psubw m3, m6
+ movu [r2 + 2 * r3 + 32], m3
+%if x < %2/2
+ lea r2, [r2 + 4 * r3]
+%endif
+%endif
+
+%if x < %2/2
mov r0, r5
- lea r2, [r2 + 2 * r3]
%endif
%assign x x+1
%endrep
@@ -2425,8 +2458,10 @@
%endmacro
%if ARCH_X86_64
- FILTER_V4_W24_sse2 32
- FILTER_V4_W24_sse2 64
+ FILTER_V4_W24_sse2 pp, 32
+ FILTER_V4_W24_sse2 pp, 64
+ FILTER_V4_W24_sse2 ps, 32
+ FILTER_V4_W24_sse2 ps, 64
%endif
;-----------------------------------------------------------------------------
diff -r b518e087f849 -r a40fcb9a2fab source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Mon May 18 16:58:50 2015 -0700
+++ b/source/common/x86/ipfilter8.h Mon May 18 17:02:18 2015 -0700
@@ -973,6 +973,8 @@
void x265_interp_4tap_vert_ps_16x24_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_ps_16x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_ps_16x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_24x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_24x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
#endif
#undef LUMA_FILTERS
#undef LUMA_SP_FILTERS
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