[x265] [PATCH] asm: chroma_hps[64xN for i444] high bit depth

aasaipriya at multicorewareinc.com aasaipriya at multicorewareinc.com
Fri May 29 06:42:56 CEST 2015


# HG changeset patch
# User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
# Date 1432874504 -19800
#      Fri May 29 10:11:44 2015 +0530
# Node ID d1672c92a283beb80c2fbea91a3cd098f26a7263
# Parent  3a8d26169979bfb0e6d59537325083a03add3d9b
asm: chroma_hps[64xN for i444] high bit depth

 chroma_hps[64x64]       4.74x    48380c->43139c
 chroma_hps[64x32]       4.85x    25369c->23050c
 chroma_hps[64x48]       4.67x    38235c->34158c
 chroma_hps[64x16]       5.04x    13408c->12725c

diff -r 3a8d26169979 -r d1672c92a283 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu May 28 16:42:35 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Fri May 29 10:11:44 2015 +0530
@@ -1585,6 +1585,10 @@
         p.chroma[X265_CSP_I422].pu[CHROMA_422_32x32].filter_hps = x265_interp_4tap_horiz_ps_32x32_avx2;
         p.chroma[X265_CSP_I422].pu[CHROMA_422_32x48].filter_hps = x265_interp_4tap_horiz_ps_32x48_avx2;
         p.chroma[X265_CSP_I422].pu[CHROMA_422_32x16].filter_hps = x265_interp_4tap_horiz_ps_32x16_avx2;
+        p.chroma[X265_CSP_I444].pu[LUMA_64x64].filter_hps = x265_interp_4tap_horiz_ps_64x64_avx2;
+        p.chroma[X265_CSP_I444].pu[LUMA_64x48].filter_hps = x265_interp_4tap_horiz_ps_64x48_avx2;
+        p.chroma[X265_CSP_I444].pu[LUMA_64x32].filter_hps = x265_interp_4tap_horiz_ps_64x32_avx2;
+        p.chroma[X265_CSP_I444].pu[LUMA_64x16].filter_hps = x265_interp_4tap_horiz_ps_64x16_avx2;
 
         p.chroma[X265_CSP_I420].pu[CHROMA_420_6x8].filter_hpp = x265_interp_4tap_horiz_pp_6x8_avx2;
         p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_hpp = x265_interp_4tap_horiz_pp_8x2_avx2;
diff -r 3a8d26169979 -r d1672c92a283 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm	Thu May 28 16:42:35 2015 +0530
+++ b/source/common/x86/ipfilter16.asm	Fri May 29 10:11:44 2015 +0530
@@ -9367,3 +9367,158 @@
 IPFILTER_CHROMA_PS_32xN_AVX2 8
 IPFILTER_CHROMA_PS_32xN_AVX2 64
 IPFILTER_CHROMA_PS_32xN_AVX2 48
+
+
+%macro IPFILTER_CHROMA_PS_64xN_AVX2 1
+INIT_YMM avx2
+%if ARCH_X86_64 == 1
+cglobal interp_4tap_horiz_ps_64x%1, 4, 7, 6
+    add                 r1d, r1d
+    add                 r3d, r3d
+    mov                 r4d, r4m
+    mov                 r5d, r5m
+
+%ifdef PIC
+    lea                 r6, [tab_ChromaCoeff]
+    vpbroadcastq        m0, [r6 + r4 * 8]
+%else
+    vpbroadcastq        m0, [tab_ChromaCoeff + r4 * 8]
+%endif
+    mova                m3, [pb_shuf]
+    vbroadcasti128      m2, [pd_n32768]
+
+    ; register map
+    ; m0 , m1 interpolate coeff
+
+    sub                 r0, 2
+    test                r5d, r5d
+    mov                 r4d, %1
+    jz                  .loop0
+    sub                 r0, r1
+    add                 r4d, 3
+
+.loop0:
+    vbroadcasti128      m4, [r0]
+    vbroadcasti128      m5, [r0 + 8]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2], xm4
+
+    vbroadcasti128      m4, [r0 + 16]
+    vbroadcasti128      m5, [r0 + 24]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2 + 16], xm4
+
+    vbroadcasti128      m4, [r0 + 32]
+    vbroadcasti128      m5, [r0 + 40]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2 + 32], xm4
+
+    vbroadcasti128      m4, [r0 + 48]
+    vbroadcasti128      m5, [r0 + 56]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2 + 48], xm4
+
+    vbroadcasti128      m4, [r0 + 64]
+    vbroadcasti128      m5, [r0 + 72]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2 + 64], xm4
+
+    vbroadcasti128      m4, [r0 + 80]
+    vbroadcasti128      m5, [r0 + 88]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2 + 80], xm4
+
+    vbroadcasti128      m4, [r0 + 96]
+    vbroadcasti128      m5, [r0 + 104]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2 + 96], xm4
+
+    vbroadcasti128      m4, [r0 + 112]
+    vbroadcasti128      m5, [r0 + 120]
+    pshufb              m4, m3
+    pshufb              m5, m3
+    pmaddwd             m4, m0
+    pmaddwd             m5, m0
+    phaddd              m4, m5
+    paddd               m4, m2
+    vpermq              m4, m4, q3120
+    psrad               m4, 2
+    vextracti128        xm5, m4, 1
+    packssdw            xm4, xm5
+    movu                [r2 + 112], xm4
+
+    add                 r2, r3
+    add                 r0, r1
+    dec                 r4d
+    jnz                 .loop0
+    RET
+%endif
+%endmacro
+
+IPFILTER_CHROMA_PS_64xN_AVX2 64
+IPFILTER_CHROMA_PS_64xN_AVX2 48
+IPFILTER_CHROMA_PS_64xN_AVX2 32
+IPFILTER_CHROMA_PS_64xN_AVX2 16
diff -r 3a8d26169979 -r d1672c92a283 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h	Thu May 28 16:42:35 2015 +0530
+++ b/source/common/x86/ipfilter8.h	Fri May 29 10:11:44 2015 +0530
@@ -390,8 +390,6 @@
 CHROMA_420_P2S_FILTERS_SSSE3(_ssse3);
 CHROMA_420_P2S_FILTERS_SSE4(_sse4);
 CHROMA_420_P2S_FILTERS_AVX2(_avx2);
-CHROMA_420_HORIZ_FILTERS(_avx2);
-CHROMA_444_HORIZ_FILTERS(_avx2);
 
 CHROMA_422_VERT_FILTERS(_sse2);
 CHROMA_422_HORIZ_FILTERS(_sse4);
@@ -399,12 +397,12 @@
 CHROMA_422_P2S_FILTERS_SSE4(_sse4);
 CHROMA_422_P2S_FILTERS_SSSE3(_ssse3);
 CHROMA_422_P2S_FILTERS_AVX2(_avx2);
-CHROMA_422_HORIZ_FILTERS(_avx2);
 
 CHROMA_444_VERT_FILTERS(_sse2);
 CHROMA_444_HORIZ_FILTERS(_sse4);
 CHROMA_420_HORIZ_FILTERS(_avx2);
 CHROMA_422_HORIZ_FILTERS(_avx2);
+CHROMA_444_HORIZ_FILTERS(_avx2);
 
 #undef CHROMA_420_VERT_FILTERS_SSE4
 #undef CHROMA_420_VERT_FILTERS


More information about the x265-devel mailing list