[x265] [PATCH] asm: chroma_hps[48x64 for i444] high bit depth - 4.88x 38394c->32817c
aasaipriya at multicorewareinc.com
aasaipriya at multicorewareinc.com
Fri May 29 06:52:02 CEST 2015
# HG changeset patch
# User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
# Date 1432875116 -19800
# Fri May 29 10:21:56 2015 +0530
# Node ID 7fccb7d165b1c11af9e3d329fad2d818175fc8c4
# Parent d1672c92a283beb80c2fbea91a3cd098f26a7263
asm: chroma_hps[48x64 for i444] high bit depth - 4.88x 38394c->32817c
diff -r d1672c92a283 -r 7fccb7d165b1 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri May 29 10:11:44 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Fri May 29 10:21:56 2015 +0530
@@ -1589,6 +1589,7 @@
p.chroma[X265_CSP_I444].pu[LUMA_64x48].filter_hps = x265_interp_4tap_horiz_ps_64x48_avx2;
p.chroma[X265_CSP_I444].pu[LUMA_64x32].filter_hps = x265_interp_4tap_horiz_ps_64x32_avx2;
p.chroma[X265_CSP_I444].pu[LUMA_64x16].filter_hps = x265_interp_4tap_horiz_ps_64x16_avx2;
+ p.chroma[X265_CSP_I444].pu[LUMA_48x64].filter_hps = x265_interp_4tap_horiz_ps_48x64_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_6x8].filter_hpp = x265_interp_4tap_horiz_pp_6x8_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_hpp = x265_interp_4tap_horiz_pp_8x2_avx2;
diff -r d1672c92a283 -r 7fccb7d165b1 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Fri May 29 10:11:44 2015 +0530
+++ b/source/common/x86/ipfilter16.asm Fri May 29 10:21:56 2015 +0530
@@ -9522,3 +9522,122 @@
IPFILTER_CHROMA_PS_64xN_AVX2 48
IPFILTER_CHROMA_PS_64xN_AVX2 32
IPFILTER_CHROMA_PS_64xN_AVX2 16
+
+INIT_YMM avx2
+%if ARCH_X86_64 == 1
+cglobal interp_4tap_horiz_ps_48x64, 4, 7, 6
+ add r1d, r1d
+ add r3d, r3d
+ mov r4d, r4m
+ mov r5d, r5m
+
+%ifdef PIC
+ lea r6, [tab_ChromaCoeff]
+ vpbroadcastq m0, [r6 + r4 * 8]
+%else
+ vpbroadcastq m0, [tab_ChromaCoeff + r4 * 8]
+%endif
+ mova m3, [pb_shuf]
+ vbroadcasti128 m2, [pd_n32768]
+
+ ; register map
+ ; m0 , m1 interpolate coeff
+
+ sub r0, 2
+ test r5d, r5d
+ mov r4d, 64
+ jz .loop0
+ sub r0, r1
+ add r4d, 3
+
+.loop0:
+ vbroadcasti128 m4, [r0]
+ vbroadcasti128 m5, [r0 + 8]
+ pshufb m4, m3
+ pshufb m5, m3
+ pmaddwd m4, m0
+ pmaddwd m5, m0
+ phaddd m4, m5
+ paddd m4, m2
+ vpermq m4, m4, q3120
+ psrad m4, 2
+ vextracti128 xm5, m4, 1
+ packssdw xm4, xm5
+ movu [r2], xm4
+
+ vbroadcasti128 m4, [r0 + 16]
+ vbroadcasti128 m5, [r0 + 24]
+ pshufb m4, m3
+ pshufb m5, m3
+ pmaddwd m4, m0
+ pmaddwd m5, m0
+ phaddd m4, m5
+ paddd m4, m2
+ vpermq m4, m4, q3120
+ psrad m4, 2
+ vextracti128 xm5, m4, 1
+ packssdw xm4, xm5
+ movu [r2 + 16], xm4
+
+ vbroadcasti128 m4, [r0 + 32]
+ vbroadcasti128 m5, [r0 + 40]
+ pshufb m4, m3
+ pshufb m5, m3
+ pmaddwd m4, m0
+ pmaddwd m5, m0
+ phaddd m4, m5
+ paddd m4, m2
+ vpermq m4, m4, q3120
+ psrad m4, 2
+ vextracti128 xm5, m4, 1
+ packssdw xm4, xm5
+ movu [r2 + 32], xm4
+
+ vbroadcasti128 m4, [r0 + 48]
+ vbroadcasti128 m5, [r0 + 56]
+ pshufb m4, m3
+ pshufb m5, m3
+ pmaddwd m4, m0
+ pmaddwd m5, m0
+ phaddd m4, m5
+ paddd m4, m2
+ vpermq m4, m4, q3120
+ psrad m4, 2
+ vextracti128 xm5, m4, 1
+ packssdw xm4, xm5
+ movu [r2 + 48], xm4
+
+ vbroadcasti128 m4, [r0 + 64]
+ vbroadcasti128 m5, [r0 + 72]
+ pshufb m4, m3
+ pshufb m5, m3
+ pmaddwd m4, m0
+ pmaddwd m5, m0
+ phaddd m4, m5
+ paddd m4, m2
+ vpermq m4, m4, q3120
+ psrad m4, 2
+ vextracti128 xm5, m4, 1
+ packssdw xm4, xm5
+ movu [r2 + 64], xm4
+
+ vbroadcasti128 m4, [r0 + 80]
+ vbroadcasti128 m5, [r0 + 88]
+ pshufb m4, m3
+ pshufb m5, m3
+ pmaddwd m4, m0
+ pmaddwd m5, m0
+ phaddd m4, m5
+ paddd m4, m2
+ vpermq m4, m4, q3120
+ psrad m4, 2
+ vextracti128 xm5, m4, 1
+ packssdw xm4, xm5
+ movu [r2 + 80], xm4
+
+ add r2, r3
+ add r0, r1
+ dec r4d
+ jnz .loop0
+ RET
+%endif
More information about the x265-devel
mailing list