[x265] [PATCH 103 of 307] x86: AVX512 interp_4tap_horiz_pp_64xN for high bit depth
mythreyi at multicorewareinc.com
mythreyi at multicorewareinc.com
Sat Apr 7 04:31:41 CEST 2018
# HG changeset patch
# User Vignesh Vijayakumar
# Date 1504160983 -19800
# Thu Aug 31 11:59:43 2017 +0530
# Node ID e5efe0bdbe0feef4588e29c81bee16651351c50f
# Parent a98d83b53b2e32b4060b05342ee041c44eff2045
x86: AVX512 interp_4tap_horiz_pp_64xN for high bit depth
i444
Size | AVX2 performance | AVX512 performance
----------------------------------------------
64x16 | 9.07x | 20.51x
64x32 | 9.51x | 19.58x
64x48 | 9.13x | 20.72x
64x64 | 9.12x | 20.52x
diff -r a98d83b53b2e -r e5efe0bdbe0f source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Aug 31 11:51:39 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu Aug 31 11:59:43 2017 +0530
@@ -2369,6 +2369,10 @@
p.chroma[X265_CSP_I444].pu[LUMA_32x24].filter_hpp = PFX(interp_4tap_horiz_pp_32x24_avx512);
p.chroma[X265_CSP_I444].pu[LUMA_32x32].filter_hpp = PFX(interp_4tap_horiz_pp_32x32_avx512);
p.chroma[X265_CSP_I444].pu[LUMA_32x64].filter_hpp = PFX(interp_4tap_horiz_pp_32x64_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_64x16].filter_hpp = PFX(interp_4tap_horiz_pp_64x16_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_64x32].filter_hpp = PFX(interp_4tap_horiz_pp_64x32_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_64x48].filter_hpp = PFX(interp_4tap_horiz_pp_64x48_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_64x64].filter_hpp = PFX(interp_4tap_horiz_pp_64x64_avx512);
}
}
diff -r a98d83b53b2e -r e5efe0bdbe0f source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Thu Aug 31 11:51:39 2017 +0530
+++ b/source/common/x86/ipfilter16.asm Thu Aug 31 11:59:43 2017 +0530
@@ -5139,6 +5139,110 @@
movu [r2 + r3], m7
%endmacro
+%macro PROCESS_IPFILTER_CHROMA_PP_64x2_AVX512 0
+ ; register map
+ ; m0 , m1 interpolate coeff
+ ; m2 , m3 shuffle order table
+ ; m4 - pd_32
+ ; m5 - zero
+ ; m6 - pw_pixel_max
+
+ movu m7, [r0]
+ movu m8, [r0 + 8]
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2], m7
+
+ movu m7, [r0 + mmsize]
+ movu m8, [r0 + mmsize + 8]
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2 + mmsize], m7
+
+ movu m7, [r0 + r1]
+ movu m8, [r0 + r1 + 8]
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2 + r3], m7
+
+ movu m7, [r0 + r1 + mmsize]
+ movu m8, [r0 + r1 + mmsize + 8]
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2 + r3 + mmsize], m7
+%endmacro
;-------------------------------------------------------------------------------------------------------------
; void interp_4tap_horiz_pp(pixel *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx
;-------------------------------------------------------------------------------------------------------------
@@ -5179,6 +5283,42 @@
IPFILTER_CHROMA_AVX512_32xN 32
IPFILTER_CHROMA_AVX512_32xN 48
IPFILTER_CHROMA_AVX512_32xN 64
+
+INIT_ZMM avx512
+%macro IPFILTER_CHROMA_AVX512_64xN 1
+cglobal interp_4tap_horiz_pp_64x%1, 5,6,11
+ add r1d, r1d
+ add r3d, r3d
+ sub r0, 2
+ mov r4d, r4m
+%ifdef PIC
+ lea r5, [tab_ChromaCoeff]
+ vpbroadcastd m0, [r5 + r4 * 8]
+ vpbroadcastd m1, [r5 + r4 * 8 + 4]
+%else
+ vpbroadcastd m0, [tab_ChromaCoeff + r4 * 8]
+ vpbroadcastd m1, [tab_ChromaCoeff + r4 * 8 + 4]
+%endif
+ vbroadcasti32x8 m2, [interp8_hpp_shuf1_load_avx512]
+ vbroadcasti32x8 m3, [interp8_hpp_shuf2_load_avx512]
+ vbroadcasti32x8 m4, [pd_32]
+ pxor m5, m5
+ vbroadcasti32x8 m6, [pw_pixel_max]
+ vbroadcasti32x8 m10, [interp8_hpp_shuf1_store_avx512]
+
+%rep %1/2 - 1
+ PROCESS_IPFILTER_CHROMA_PP_64x2_AVX512
+ lea r0, [r0 + 2 * r1]
+ lea r2, [r2 + 2 * r3]
+%endrep
+ PROCESS_IPFILTER_CHROMA_PP_64x2_AVX512
+ RET
+%endmacro
+
+IPFILTER_CHROMA_AVX512_64xN 16
+IPFILTER_CHROMA_AVX512_64xN 32
+IPFILTER_CHROMA_AVX512_64xN 48
+IPFILTER_CHROMA_AVX512_64xN 64
;-------------------------------------------------------------------------------------------------------------
;ipfilter_chroma_avx512 code end
;-------------------------------------------------------------------------------------------------------------
\ No newline at end of file
More information about the x265-devel
mailing list