[x265] [PATCH 143 of 307] x86: AVX512 interp_4tap_horiz_ps_48x64 for high bit depth

mythreyi at multicorewareinc.com mythreyi at multicorewareinc.com
Sat Apr 7 04:32:21 CEST 2018


# HG changeset patch
# User Jayashri Murugan <jayashri at multicorewareinc.com>
# Date 1509433297 -19800
#      Tue Oct 31 12:31:37 2017 +0530
# Node ID 75fb26372fc64e057c467625e79235c7dedb13c5
# Parent  058cefca7c5feb5515b3e8778d5a68a32e58ea1e
x86: AVX512 interp_4tap_horiz_ps_48x64 for high bit depth

avx2 performance  : 14.39x
avx512 performance: 41.98x

diff -r 058cefca7c5f -r 75fb26372fc6 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri Oct 27 13:44:18 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp	Tue Oct 31 12:31:37 2017 +0530
@@ -2695,6 +2695,8 @@
         p.chroma[X265_CSP_I444].pu[LUMA_16x4].filter_hps = PFX(interp_4tap_horiz_ps_16x4_avx512);
         p.chroma[X265_CSP_I444].pu[LUMA_16x64].filter_hps = PFX(interp_4tap_horiz_ps_16x64_avx512);
 
+        p.chroma[X265_CSP_I444].pu[LUMA_48x64].filter_hps = PFX(interp_4tap_horiz_ps_48x64_avx512);
+
     }
 #endif
 }
diff -r 058cefca7c5f -r 75fb26372fc6 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm	Fri Oct 27 13:44:18 2017 +0530
+++ b/source/common/x86/ipfilter16.asm	Tue Oct 31 12:31:37 2017 +0530
@@ -6547,6 +6547,180 @@
 IPFILTER_CHROMA_PS_AVX512_16xN 24
 IPFILTER_CHROMA_PS_AVX512_16xN 32
 IPFILTER_CHROMA_PS_AVX512_16xN 64
+
+%macro PROCESS_IPFILTER_CHROMA_PS_48x2_AVX512 0
+    ; register map
+    ; m0 , m1 - interpolate coeff
+    ; m2 , m3 - shuffle load order table
+    ; m4      - INTERP_OFFSET_PS
+    ; m5      - shuffle store order table
+
+    movu            m6,        [r0]
+    movu            m7,        [r0 + 8]
+
+    pshufb          m8,        m6,        m3
+    pshufb          m6,        m2
+    pmaddwd         m6,        m0
+    pmaddwd         m8,        m1
+    paddd           m6,        m8
+    paddd           m6,        m4
+    psrad           m6,        INTERP_SHIFT_PS
+
+    pshufb          m8,        m7,        m3
+    pshufb          m7,        m2
+    pmaddwd         m7,        m0
+    pmaddwd         m8,        m1
+    paddd           m7,        m8
+    paddd           m7,        m4
+    psrad           m7,        INTERP_SHIFT_PS
+
+    packssdw        m6,        m7
+    pshufb          m6,        m5
+    movu            [r2],      m6
+
+    movu            m6,        [r0 + r1]
+    movu            m7,        [r0 + r1 + 8]
+
+    pshufb          m8,        m6,        m3
+    pshufb          m6,        m2
+    pmaddwd         m6,        m0
+    pmaddwd         m8,        m1
+    paddd           m6,        m8
+    paddd           m6,        m4
+    psrad           m6,        INTERP_SHIFT_PS
+
+    pshufb          m8,        m7,        m3
+    pshufb          m7,        m2
+    pmaddwd         m7,        m0
+    pmaddwd         m8,        m1
+    paddd           m7,        m8
+    paddd           m7,        m4
+    psrad           m7,        INTERP_SHIFT_PS
+
+    packssdw        m6,        m7
+    pshufb          m6,        m5
+    movu            [r2 + r3], m6
+
+    movu            ym6,       [r0 + mmsize]
+    vinserti32x8    m6,        [r0 + r1 + mmsize],     1
+    movu            ym7,       [r0 + mmsize + 8]
+    vinserti32x8    m7,        [r0 + r1 + mmsize + 8],  1
+
+    pshufb          m8,        m6,        m3
+    pshufb          m6,        m2
+    pmaddwd         m6,        m0
+    pmaddwd         m8,        m1
+    paddd           m6,        m8
+    paddd           m6,        m4
+    psrad           m6,        INTERP_SHIFT_PS
+
+    pshufb          m8,        m7,        m3
+    pshufb          m7,        m2
+    pmaddwd         m7,        m0
+    pmaddwd         m8,        m1
+    paddd           m7,        m8
+    paddd           m7,        m4
+    psrad           m7,        INTERP_SHIFT_PS
+
+    packssdw        m6,        m7
+    pshufb          m6,        m5
+    movu            [r2 + mmsize],      ym6
+    vextracti32x8   [r2 + r3 + mmsize], m6,        1
+%endmacro
+
+%macro PROCESS_IPFILTER_CHROMA_PS_48x1_AVX512 0
+    ; register map
+    ; m0 , m1 - interpolate coeff
+    ; m2 , m3 - shuffle load order table
+    ; m4      - INTERP_OFFSET_PS
+    ; m5      - shuffle store order table
+
+    movu            m6,        [r0]
+    movu            m7,        [r0 + 8]
+
+    pshufb          m8,        m6,        m3
+    pshufb          m6,        m2
+    pmaddwd         m6,        m0
+    pmaddwd         m8,        m1
+    paddd           m6,        m8
+    paddd           m6,        m4
+    psrad           m6,        INTERP_SHIFT_PS
+
+    pshufb          m8,        m7,        m3
+    pshufb          m7,        m2
+    pmaddwd         m7,        m0
+    pmaddwd         m8,        m1
+    paddd           m7,        m8
+    paddd           m7,        m4
+    psrad           m7,        INTERP_SHIFT_PS
+
+    packssdw        m6,        m7
+    pshufb          m6,        m5
+    movu            [r2],      m6
+
+    movu            ym6,       [r0 + mmsize]
+    movu            ym7,       [r0 + mmsize + 8]
+
+    pshufb          ym8,        ym6,        ym3
+    pshufb          ym6,        ym2
+    pmaddwd         ym6,        ym0
+    pmaddwd         ym8,        ym1
+    paddd           ym6,        ym8
+    paddd           ym6,        ym4
+    psrad           ym6,        INTERP_SHIFT_PS
+
+    pshufb          ym8,        ym7,        ym3
+    pshufb          ym7,        ym2
+    pmaddwd         ym7,        ym0
+    pmaddwd         ym8,        ym1
+    paddd           ym7,        ym8
+    paddd           ym7,        ym4
+    psrad           ym7,        INTERP_SHIFT_PS
+
+    packssdw        ym6,        ym7
+    pshufb          ym6,        ym5
+    movu            [r2 + mmsize],       ym6
+%endmacro
+
+INIT_ZMM avx512
+%if ARCH_X86_64 == 1
+cglobal interp_4tap_horiz_ps_48x64, 4,7,9
+    add             r1d, r1d
+    add             r3d, r3d
+    mov             r4d, r4m
+    mov             r5d, r5m
+
+%ifdef PIC
+    lea             r6, [tab_ChromaCoeff]
+    vpbroadcastd    m0, [r6 + r4 * 8]
+    vpbroadcastd    m1, [r6 + r4 * 8 + 4]
+%else
+    vpbroadcastd    m0, [tab_ChromaCoeff + r4 * 8]
+    vpbroadcastd    m1, [tab_ChromaCoeff + r4 * 8 + 4]
+%endif
+    vbroadcasti32x8 m2, [interp8_hpp_shuf1_load_avx512]
+    vbroadcasti32x8 m3, [interp8_hpp_shuf2_load_avx512]
+    vbroadcasti32x4 m4, [INTERP_OFFSET_PS]
+    vbroadcasti32x8 m5, [interp8_hpp_shuf1_store_avx512]
+
+    mov               r6d,         64
+    sub               r0,          2
+    test              r5d,         r5d
+    jz                .loop
+    sub               r0,          r1
+    add               r6d,         3
+    PROCESS_IPFILTER_CHROMA_PS_48x1_AVX512
+    lea               r0, [r0 + r1]
+    lea               r2, [r2 + r3]
+    dec               r6d
+.loop:
+    PROCESS_IPFILTER_CHROMA_PS_48x2_AVX512
+    lea             r0,  [r0 + 2 * r1]
+    lea             r2,  [r2 + 2 * r3]
+    sub             r6d, 2
+    jnz             .loop
+    RET
+%endif
 ;-------------------------------------------------------------------------------------------------------------
 ;ipfilter_chroma_avx512 code end
 ;-------------------------------------------------------------------------------------------------------------


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